JPS62144467A - Image reader - Google Patents

Abstract

PURPOSE:To read an original image while inverting the read scanning direction of the original image by providing an XOR circuit inverting the content of a read address counter and a changeover circuit inverting the data arrangement of a read output register. CONSTITUTION:The original image is read in parallel by an image sensor 1, converted into an 8-bit data string by a shift register 3 and written on a line memory 4. A write counter 5 designates a write address of the memory 4 in this case. The data is written on a line memory A shown in the figure at random as address 0, address 64, address 128.... In reading the data, the data is read sequentially from the memory 4. When an inverse read direction signal is given in this case, it is operated that the read address of the memory 4 is read sequentially from the final address of the memory. When an inverted scanning signal comes, the read address is inverted by the data in the read counter 6 through the XOR circuit 7. A selection circuit 8 changes over the read/write address.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an image reading device that converts a document image into an electrical signal using an image sensor. It is widely used as an input device for image signals. In particular, an image sensor consisting of a plurality of image sensors or chips connected together can be made into a high-speed reading device by simultaneously driving the plurality of sensor chips in parallel.

An example of the conventional image reading device described above will be described below with reference to the drawings.

FIG. 6 shows a schematic configuration diagram of a conventional image reading device. In FIG. 6, 20 is an image sensor, 21 is an image sensor, a chip, 2214 a sensor drive circuit,
23 is a shift register, 24 is a read register, 25 is a data bus, 26 is a memory for 2 lines, 27 is a memory 2
6 is a write address counter, 28 is a read address counter, and 29 is a selection circuit for switching the address of the memory 26.0 The operation of the image reading apparatus configured as above will be described below.

First, image reading signals from the image sensors 2o, which are driven in parallel by the drive circuit 22, are binarized according to black and white levels and are sequentially input to the shift register 23. The image signals corresponding to each sensor chip are binarized and temporarily input into the memory 26. The image data (D1 to Da) read out in parallel here are written to the line memory A. The data of the previous line is written in the line memory B, and at the same time as the data is written to the line memory A, the data of the previous line is sequentially read from the line memory B and sequentially output to the read register 24. At this time, the image signals read in parallel from the image sensor 20 are converted into serial data, and the write address and read address of the memory 26 are respectively switched so that the read data is output.

27 is a write address counter, 28 is a read address counter, and the address to the memory 26 is switched by a selection circuit 29. FIG. 7 is a diagram showing the state of writing data into the memory and the order of reading data. The read data is summarized in 8 bits and sent to line memory in 0.6 bits.
4,128. ...Written to each address. In this example, one line of image data is 8 bits x 512 bits:=
It is 4096 bits, and the memory is 2 lines and 81
The 92-pit memory is divided into two blocks.

When reading, the data is read out so that it is lined up in series with addresses 612 and 1, and 513. Next, at the same time that the read image data is written into the line memory B, the data in the line memo IJA is sequentially read out. Thereafter, this operation is repeated alternately to convert the parallel read image data into serial data and read them out.

Problems to be Solved by the Invention However, in the above configuration, the image reading scanning direction is fixed, so the document can be read in only one direction. As an application of the reading device, when a document is placed upside down, it is necessary to scan and read it from the opposite direction, or to read the image by reversing it left and right.

In view of the above-mentioned problems, the present invention provides an image reading device that can read a document from the opposite direction or flip the document horizontally.

Means for Solving the Problems In order to solve the above problems, the image reading device of the present invention includes:
It is equipped with a memory for two lines, a selection circuit that reverses the read address of the memory, and a switching circuit that reverses the arrangement of the output data of the read register.

According to the above-described configuration, the present invention uses two lines of memory, stores the read output of the image sensor in one line of the memory, and also sets the value of the read memory address counter so that the output signal is inverted at the time of reading. Select and switch,
At the same time, the arrangement of the output data of the read register is reversed, and the read scanning direction is reversed for reading.

Embodiment Hereinafter, an image reading apparatus according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a schematic configuration diagram of an image reading device according to an embodiment of the present invention. 1st
In the figure, 1 is an image sensor, 2 is a drive circuit for the image sensor 1, 3 is a shift register, 4 is a memory for two lines, 5 is a write counter that specifies the write address of the memory 4, 6 is a read counter, A is an XOR circuit, 8 is a selection circuit, 9 is a read register, and 10 is a switching circuit.

The operation of the image reading apparatus configured as described above will be described below with reference to FIGS. 1 and 2.

In FIG. 1, original images are read out in parallel by an image sensor 1, converted into black and white binary values, converted into an 8-bit data string by a shift register 3, and written into a line memory 4. 5 is a write counter that specifies the write address of the memory 4 at this time, and in the line memory A in FIG. 2, addresses 0, 64, 128, etc. written. Next, when reading data, data is sequentially read from the memory 4. At this time, when the reverse read small direction signal is activated, the read address of the memory 4 is set so as to sequentially read from an unaddressed address in the memory. 6 is a read counter that specifies the read address of the memory 4; 7
For example, it is an XOR circuit, and when a reverse scanning signal comes, the data of the read counter 6 passes through the XOR circuit 7, thereby reversing the read address. Reference numeral 8 denotes a selection circuit for switching the read address and write address, respectively.

FIG. 3 is an example showing a configuration diagram of an XOR circuit for reversing read addresses. In FIG. 3, when the inversion signal is turned ON, the address value of the read memory address is inverted by the XOR circuit 12, and an inversion address is generated. A counter circuit 11 serves as a read and write address counter, and a selection circuit 13 selects a read address when reading from the memory and a write address when writing to the memory. Reference numeral 14 designates a switching circuit for line memories for two lines, which alternately switches so that when one line memory is in writing mode, the other line memory is in read mode.

In Figure 1, 8 is read out after being reversed as described above.
The bit data is latched into the read register 9. Here, it is necessary to output the 8-pit data string with its arrangement reversed. 1o is a switching circuit that inverts the arrangement of read registers.

FIG. 4 shows an example of a switching circuit. The reverse signal causes the upper and lower bits of the output data to be swapped.

FIG. 6 is a diagram showing the state of the reading scanning direction when the reading direction of the original is reversed.

As described above, this embodiment has a memory for two lines, and has a means for selectively switching the address for writing and reading, and a means for switching the address for reading in the reverse direction using a read direction reversal signal. , has a switching circuit that inverts the data arrangement of the read register, and can perform reading scanning by reversing the reading direction of the document.

In the above embodiment, the case where there are eight sensor chips is shown, but the same method can be applied even when there is one sensor chip. The same applies to the case where the sensors of a plurality of sensor chips are sequentially driven in series.

Effects of the Invention As described above, the present invention provides an XOR circuit that inverts the value of the read address counter and a switching circuit that inverts the data array of the read output register, thereby reversing the scanning direction of the original image and reading it. I can do things. As a result, it is possible to read the original in the front and back directions, or to read the original with the left and right sides reversed.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram of an image reading device according to an embodiment of the present invention, FIG. 2 is a diagram explaining reading in the reverse direction, FIG. 3 is a configuration diagram of a circuit for inverting a read address counter, and FIG.
The figure is a block diagram of a circuit that inverts the data array of the read register, FIG. 5 is a diagram showing a state in which the reading direction of a document is reversed and scanned, and FIG. 6 is a schematic block diagram of a conventional image reading device.
FIG. 7 is a diagram showing the state of a line memory of a conventional image reading device. 1...Image sensor, 2...4 drive circuit, 3...Shift register, 4...
2 lines of memory, 5...Write counter, 6.
...Reading counter, 7...XOR circuit,
8... Selection circuit, 9... Read register, 1o... Switching circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person7-
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Claims (1)

[Claims] An image sensor, a drive circuit that drives the image sensor, a shift register that converts the outputs from the image sensor into parallel, and 2 that stores the read image data.
A memory having a capacity for one line, a write counter and a read counter that determine the address of the memory, a selection circuit that selects the output of each of the counters and inputs it to the address of the memory, and a selection circuit that selects the output of each of the counters and inputs it to the address of the memory, means for changing the reading order of parallel read data from the sensor by changing the write address and read address to the memory, which is composed of a read register for storing; and an XOR circuit for inverting the value of the read counter; An image reading device comprising: a switching circuit for reversing the data arrangement of the output of the read register.