JPH0371326A - Scanning adding device - Google Patents

Abstract

PURPOSE:To execute the addition of two dots or more, and also, the addition processing of a minute dot of a 1/2 dot unit by deciding whether data corresponds to a prescribed pattern or not and outputting it when data is sent out to a reference area, and selecting whether a deciding output is converted by a discriminating signal in the deciding output or not. CONSTITUTION:The subject device is provided with a means 11 for sending out data to a reference data area in the sub-scanning direction, a means 12 for deciding whether the data in the reference area is a prescribed pattern or not, and a means 13 for storing a discriminating signal for whether scanning addition of two dots or more in the sub-scanning direction in a deciding output is executed or not. Also, this device is provided with a means for selecting whether the deciding output is converted by the discriminating signal or not, and a means 15 for sending out a discriminating signal for identifying the number of times of read-out of one picture element data with respect to the reference area output means 11, the scanning addition deciding means 12 and the scanning addition result output selecting means 14. In such a way, the addition of two dots or more in the sub-scanning direction, and also, a minute addition processing of a 1/2 dot unit can be executed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a recording device that handles line drawings, and more particularly to a drawing adding device that changes the width of line drawings.

[Prior Art] A block diagram of a conventional drawing line adding device is shown in FIG. In the figure, 81 is a reference area output circuit, 82 is an image addition determination circuit, 801 is an input terminal, and 802 is an output terminal.

Generally, when printing newspapers and magazines, the film output from the facsimile is often printed as is. At this time, in the smallest pixel unit of the output image from the facsimile, the ink is not completely spread and is not the same as the actual line drawing. It may be printed thinner than the width. In order to solve this problem, conventional image line adding devices electrically add one or more pixels. Further, this drawing adding device is also used when making a line drawing thicker or thinner.

Reference area output circuit 81 of such a conventional drawing line adding device
The reference area is large and in order to process pixel data read and written in this area at high speed, this pixel data is treated as parallel data and this parallel data is sent to the next stage drawing line addition determination circuit 82. There is. and,
The drawing line addition determination circuit 82 which receives this data is constituted by a ROM, and performs processing to make the line thicker or thinner by l dots in the sub-scanning direction based on this received data.

[Problems to be Solved by the Invention] The above-mentioned conventional line addition device can only make the line thicker or thinner by 1 dot in the sub-scanning direction;
There was a problem in that it was not possible to add more than a dot. Further, it was not possible to perform detailed addition processing in units of half the amount of one dot, that is, in units of 1/2 dot. Furthermore, in the reference area output circuit 81, the reference area is large and in order to process it at high speed, it must be treated as parallel data, and the hardware required to send this parallel data to the next stage drawing line addition determination circuit 82. There was also a problem in that the amount increased, leading to an increase in costs.

[Means for Solving the Problems] In order to solve such problems, the drawing line adding device of the present invention includes a reference area output means for sending data to a reference data area in the sub-scanning direction, and a reference area output means for sending data to a reference data area in the sub-scanning direction; A line addition determination means for determining whether or not corresponds to a predetermined pattern, and a determination signal for determining whether or not to add two or more dots in the sub-scanning direction among the determination outputs from the line addition determination means. a discrimination signal storage means for storing a determination signal, a drawing line addition result output selection means for selecting whether or not to convert the judgment output based on the discrimination signal, a reference area output means, a drawing addition determination means, and a drawing line addition result output selection means. and readout identification signal output means for sending out an identification signal for identifying the number of times one pixel data is read out.

[Operation] When data is sent to the reference area, the drawing line addition determining means determines whether or not this data corresponds to a predetermined pattern and outputs the data. Then, the drawing line addition result output selection means is
Depending on the discrimination signal of this judgment output, it is selected whether or not to convert the judgment output.

[Example] Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the drawing line adding device of the present invention. In the figure, 11 is a reference area output circuit;
12 is a drawing line addition determination circuit; 13 is a determination signal storage circuit; 1
4 is an image addition result output selection circuit, 15 is a read identification signal output circuit, 101 is an input terminal, and 102 is an output terminal.

Next, FIG. 2 is an explanatory diagram showing reference area data tit outputted by the reference area output circuit 11. This reference area is composed of one dot in the main scanning direction and five lines in the sub-scanning direction. In the figure, A and B are each recorded one pixel data, A is the first read data for one input pixel, and B is second read data for one input pixel. Also, OA and @B are converted pixel data, *
A and *B are pixel data of interest. One piece of data A and one piece of data B constitute one input pixel data, that is, one line data. Also, these data are changed in the sub-scanning direction, that is, from data B to data A in the figure.
The data is sequentially sent in the direction of →data B→data A, and so on. In addition, in the case of this embodiment, as will be described later, focusing on the target pixel data *A and *B of black pixels, several dots are added to this data to convert the converted pixel data OA of white pixels.
, OB to black pixels. Note that it is also possible to convert white pixels to black pixels in the same way.

Further, FIGS. 3 and 4 are explanatory diagrams for explaining the operation of converting data A and B. Note that the data in the shaded area in the figure indicates data for black pixels, and the data in areas other than the shaded area indicate data for white pixels.

Next, the general operation of the image adding device configured as above will be explained. When binary serial data or parallel data arrives from the input terminal 101, this data is input to the reference area output circuit 11, and the input data is stored line by line. After this data has been stored for five lines, reading out one dot from each line is started. At this time, this reading speed corresponds to twice the data input speed, and the data A in FIG.
As shown by B, two lines of the same data are read and output.

The data read out by the reference area output circuit 11 in this manner is sent to the image line addition determination circuit 12. Then, the drawing line addition determination circuit 12 inputting this data,
Data A and data B are alternately determined by a ROM section 61 provided in this circuit 12 and will be described later, and the determination is made as follows.

That is, the first determination process is for converting 1 dot into 1172 dots. In this case, (1) in Figure 3
When the pattern data as shown in the figure is input, the drawing line addition determination addition circuit 12 converts the converted pixel data @A and OB as shown in Figure 3 (2), and adds black to the data @A. Add 1/2 dot of pixels. As a result, the drawing line addition judgment circuit 12 sends the drawing line addition judgment result data in which 1 dot is converted to 1172 dots to the drawing line addition result output selection circuit 14, and the drawing line addition result output selection circuit 14 outputs this data. The signal is sent to the terminal 102. Note that this 1.1. /2
A dot is 3 dots with twice the resolution for 1 dot of image data.
It is to record times.

Further, the second determination process is a case of converting an 1 dot into a 21/2 dot. In this case, the following determination process is performed. First, the drawing line addition determination circuit 12 inputs the pattern data as shown in FIG. 4 (1), and converts the converted pixel data OA as shown in FIG.
, @B to a black pixel. In other words, 1 for data @A
172 black pixels are added to each of /2 dot and data @B. As a result, the image addition determination circuit (2) sends out data of the image addition determination result in which the 1-dot is converted to 2 dots. Then, at this time, the image addition determination circuit 12 adds 1/2 dot to the determination signal in the main scanning direction and sends it out. Among the signals sent from the image addition determination circuit 12, the determination signal is sent to the determination signal storage circuit 13, and the image addition determination result data is sent to the image addition result output selection circuit 14. Then, the discrimination signal storage circuit 13 that receives this discrimination signal stores it and sends out this discrimination signal with a delay of one line. In addition, the line addition result output selection circuit 14 shifts the data by one line as shown in FIG. By adding the 1/2 dot discrimination signal sent from the discrimination output storage circuit 13 to the data added to 21
It is converted into 72-dot data and sent. As a result, the converted pixel data @A from the output terminal 102 is A-4B-4A.
→B... are output alternately in the order.

On the other hand, in the read identification signal output circuit 15, corresponding to the read line data from the reference area output circuit 11, that is, data A and B, for example, an rH signal is sent when the data is A, and an "L" signal is sent when the data is B. In this way, an identification signal is generated in synchronization with the read line data to identify the number of times this data is read. This identification signal is used as a write gate signal in the reference area output circuit 11, and is used as a write gate signal in the image addition determination circuit 12 as described above.
It is used when adding 1/2 dots, and in the drawing line addition result output selection circuit 14, it is used as an identification signal that can be added only to data A when adding 21/2 dots.

Next, the reference area output circuit 11, the drawing line addition determination circuit 12, and the drawing line addition result output selection circuit 14 will be explained in detail. The reference area output circuit 11 and the drawing line addition determination circuit 12 are significantly smaller in circuit size than conventional drawing line adding devices.

FIG. 5 is a block diagram of the reference area output circuit 11. In the same figure, 501.507 is an input terminal, 502 to 50
6 is an output terminal, 510 to 514 are input switching element parts, 52
0 to 524 are 1-line delay element sections, 530 is a decoder,
540 is a counter, and 550 to 554 are inverters.

Next, FIG. 6 is a block diagram of the drawing line addition determination circuit 12. In the figure, 61 is a ROM section, 601 and 602 are input terminals, and 603 is an output terminal.

Next, FIG. 7 is a block diagram of the drawing line addition result output selection circuit 14. In the figure, 71 is an exclusive OR circuit;
72 is an AND circuit, 701 to 703 are input terminals, 703
is the output terminal.

The detailed operations of the reference area output circuit 12, the object addition determination circuit 12, and the object addition result output selection circuit 14 configured as described above will be explained.

First, the operation of the reference area output circuit 11 will be explained. When binary serial data or parallel data of every other line, that is, intermittent one line, arrives from the input terminal 501 with respect to the read line data, this data is sent to the input switching element sections 510 to 514. On the other hand, if one line of intermittent signals arrives from the input terminal 507 at this time,
The counter 540 performs a ring count with a period of O to 4 (because it is 5 lines in the sub-scanning) using this signal, and this count value is sent to the decoder 530.

The decoder 530 decodes this count value and inputs it to the input switching element sections 510 to 514 and the inverter 5, respectively.
1-line delay element sections 520 to 52 via 50 to 554
Send to 4. As a result, input switching element sections 510 to 51
4 are selected at different timings,
The one-line delay element sections 520 to 524 are also selected at different timings. Since the 1-line delay element sections 520-524 are selected via the inverters 550-554, they can each output data only when the corresponding input switching element sections 510-514 are not selected. In other words, one line of data out of five lines of data arriving at the input terminal 501 is sent to the output terminals 502 to 50 sequentially line by line.
At this time, all other 4 line data are sent to one of the 1 line delay element sections 520 to 524.
Sent from

In this way, one line of data is delayed line by line, and five lines of data are sent out. In addition, writing 1
When reading out a line, two lines of the same data are read out and sent out as described above, so the write signal is sent out when writing the first data out of the two lines of read data.

Next, the operation of the image addition determination circuit 12 will be explained.

The determination of whether to add a drawing line is made by the ROM section 61 as described above. When the count value sent from the counter 540 in the reference area output circuit 11 arrives at the input terminal 601 connected thereto, this count value is sent to the upper bit terminal (not shown) of the ROM section 61. On the other hand, the 1-line delay element section 520 in the reference area output circuit ll
The data from ~524 is input to the input terminal 6 connected to this.
02, and this data is sent to the lower bit terminal (not shown) of the ROM section 61. A determination pattern is written in advance in the ROM section 61, and this determination pattern is selected for each line of data each time data arrives.
The selected pattern data is sent to the output terminal 603 line by line.

Next, the operation of the drawing line addition result output selection circuit 14 will be explained in detail. As described above, this image addition result output selection circuit 14 either sends the image addition determination result data from the image addition determination circuit 12 to the output terminal 703 as is, or 0 Next, the table below shows the output results of the line addition result output selection circuit 14. .

As shown in the data column of the table above, for example, the drawing line addition determination result data from the drawing line addition determining circuit 12 via the input terminal 703 is "HJ" when the pixel is a black pixel, and "L" when the pixel is a white pixel.
”, and as shown in the discrimination column of the table above, the input terminal 70
1,702 and the discrimination signal from the discrimination output storage circuit 13 via the AND circuit 72.
”, when adding r) IJ when not adding a drawing line,
The exclusive OR circuit 71 that has input this data and the discrimination signal performs an operation (exclusive OR) on this data and the discrimination signal, and outputs the result as shown in the output column of the table above to the output terminal. 703.

In other words, when adding black pixel data r)(J, ('
When LJ), black pixel data rH is sent out, and when not (when HJ), white pixel data "L" is sent out.Similarly, the addition of own pixel data "L" is sent out. When it is carried out (when it is "L"), white pixel data "LJ" is sent out, and when it is not carried out (when it is "H"), black pixel data r
H, is sent.

Furthermore, in the case of converting to 21/2 dots, the judgment as to which data should be converted and added to 172 dots is made based on the identification signal output from the readout identification signal output circuit 15 as described above. Determine whether data A(ll) or data B(l), and
1/2 dot is added only on the side.

In this embodiment, the case of 1 dot in the main scanning and 5 lines in the sub-scanning has been described, but it can be easily realized in the same way for other numbers of dots and lines. Although the conversion was made to add two dots, it is clear that this can also be easily converted to other numbers of dots.

[Effects of the Invention] As explained above, according to the drawing line addition device of the present invention, when data is sent to the reference area, the drawing line addition determination means:
It is determined and output whether or not this data corresponds to a predetermined pattern, and the line addition result output selection means selects whether or not to convert the determination output based on a determination signal of the determination output. Therefore, it is possible to perform the process of adding two or more dots, and it is also possible to perform the process of adding fine dots in units of 172 dots. In addition, the circuit scale of the image addition determination means can be reduced, and the reference area output means connected thereto can also be configured easily, which can significantly reduce the circuit scale of the image addition device and reduce costs. This has the effect of being able to.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the drawing line adding device of the present invention, FIGS. 2 to 4 are explanatory diagrams for explaining the operation,
5 to 7 are detailed block diagrams of the drawing line adding apparatus of the present invention, and FIG. 8 is a block diagram of a conventional drawing line adding apparatus. 11... Reference area output circuit, 12... Image addition determination circuit, 13... Discrimination output storage circuit, 14...
- Drawing line addition result output selection circuit, 15...readout identification signal output circuit. Figure 1 Figure 3 Figure 3

Claims (1)

[Scope of Claims] A drawing line adding device that receives image data from a reading device or a computer and adds drawing lines to the image data, comprising: a reference area output unit that sends data to a reference data area in the sub-scanning direction; , a drawing line addition determining means for determining whether the data in this reference area corresponds to a predetermined pattern; and drawing line addition of two or more dots in the sub-scanning direction among the determination outputs from the drawing line addition determining means. a discrimination signal storage means for storing a discrimination signal for determining whether or not to perform the above determination, a drawing line addition result output selection means for selecting whether or not to convert the determination output based on the discrimination signal, and the reference area output means; 1. A drawing line addition apparatus comprising a drawing identification signal outputting means for sending an identification signal for identifying the number of readings of one pixel data to a drawing addition determination means and a drawing drawing result output selection means.