JPS62141739A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To eliminate disconnection and to improve reliability in the resistance to electromigration or the like by a method wherein, after a contact or a via hole is formed, a thin semiconductor or metal film is formed on the side surface thereof, and a gas containing metal is made to react to bury the contact or the via hole with the metal selectively and completely. CONSTITUTION:A contact hole (via hole) 4 is formed in an interlayer insulating film 3 and a polycrystalline silicon semiconductor thin films is formed on the whole surface by a CVD method. Next, the polycrystalline silicon semiconductor thin film 5 on the bottom surface of the contact hole (via hole) 4 and on the interlayer insulating film 3 is removed by using anisotropic dry etching. Since the etching goes only in the vertical direction, the polycrystalline silicon semiconductor thin film 5 is left on the side surface of the contact hole (via hole) 4. Then, a gas prepared by diluting WF6 with Ar is made to react with the polycrystalline silicon 5. In other words, tungsten W is made to grow selectively only on the side surface of the contact hole (via hole) 4 b using the reducing reaction of silicon. Since hydrogen has a property that it is adsorbed only on the surface of metal to ionize the same, the reducing reaction of hydrogen grows only from the side surface (where W is present) and the bottom surface (where Al is present) of the contact hole (via hole) 4, and does not grow on the insulating film 3.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a high-density, large-scale integrated semiconductor integrated circuit having fine electrode contacts and multilayer wiring.

2. Description of the Related Art When metal for wiring is formed in contacts of electrodes or in peer holes for multilayer wiring, sputtering with a beam 4 or the like is usually used. However, when the width of the contact or peer hole is 1 μm or less, the Afi sputtering method hardly allows particles to adhere to the side surfaces of the contact or peer hole. As a result, important problems arise in terms of reliability, such as resistance to reelectromigration caused by disconnection of the interconnect. To prevent this, there is a technology that selectively fills contacts and peer holes with metal.

FIG. 8 shows a cross-sectional view of a fine multilayer wiring contact manufactured by this conventional manufacturing method. In the same figure, 1o is an insulating film, 1
1 is a kl wiring, 12 is an interlayer insulating film, 13 is a cosit hole (pier hole), 14 is a high melting point metal (tungsten in this case) embedded in the contact hole (pier hole) 13, and 15 is deposited on the insulator 12 Tungsten W
It is. This was formed behind the scenes as follows.

That is, a contact hole (pier hole) 1 is formed in the insulating film 12.
After drilling 3, WF6 (tungsten hexafluoride) and H2
(Hydrogen) is reacted in the following relationship, and (WF6+ 3H2→W+6HF↑) Wl 4 can be deposited in the contact hole (pier hole) 13. At this time, the adhesion probability of WF6 is different on the insulating film 12 and on the mull electrode 11, and it hardly adheres on the insulating film. Therefore, the WF6 deposited on the mulch electrode 11 is annularized by H2, and W (tungsten) is selectively embedded only in the contact hole (pier hole) 13.

Problems to be Solved by the Invention However, this method causes the following problems. That is, if the reaction is carried out for a long time, W will be deposited mainly in the by-products attached to the insulating material 12 and the nuclei already present on the surface of the insulating film 12. This is Wl5 shown in FIG.

When W is deposited on the insulating film 12 in this way, selectivity is lost and it becomes impossible to fill only the contact hole (pier hole) 13 with W. With this method, approximately 2000 ~
The selective growth of W with a thickness of 3000 people is the limit, and 0.6
A contact hole (pier hole) of ~1 μm cannot be completely filled. For this reason, if metal is formed as an electrode, problems such as disconnection and reliability problems occur.

The present invention has been made in view of these conventional drawbacks, and an object of the present invention is to selectively and completely fill only minute contacts and peer holes with metal using a simple method.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention forms a contact or a peer hole, then forms a thin semiconductor film or a thin metal film on the side surface, and reacts a metal-containing gas to select a metal-containing gas. The contacts and peer holes are completely filled with metal.

Effects of the present invention By using the method described above, electrodes and wiring can be formed in minute contact holes and peer holes without disconnection, and reliability is also improved.

Embodiment FIG. 1 shows an embodiment method of the present invention, and is a sectional view of a contact hole (pier hole) completely filled with metal (tungsten). In the figure, 1 is an insulating film, 2 is an interconnect, 3 is an interlayer insulating film, and 7 is tungsten W embedded in a contact hole (pier hole). In the figure, only the contact hole (pier hole) 7 is selectively and completely filled with tungsten.

The manufacturing method of this embodiment will be explained below based on FIGS. 2 to 6. In FIG. 2, 1 is an insulating film, 2 is an A4 wiring, and 3 is an interlayer insulating film. A contact hole (
Pier hole) 4 is formed. In FIG. 3, a polycrystalline silicon semiconductor thin film is formed on the entire surface by CVD. In this case, a metal thin film may be formed instead of the polycrystalline silicon semiconductor thin film. In FIG. 4, the polycrystalline silicon semiconductor thin film 6 on the bottom of the contact hole (pier hole) 4 and on the interlayer insulating film 3 is removed using anisotropic dry etching. Since the etching progresses only in the vertical direction, the polycrystalline silicon semiconductor thin film 6 remains on the side surface of the contact hole (pier hole) 4. In Figure 6, wir6
A gas obtained by diluting tungsten fluoride (e) with argon (argon) is reacted with polycrystalline silicon 5. That is, 2WF
Tungsten W is selectively grown only on the side surface of the contact hole (pier hole) 4 by utilizing the silicon ring reaction of 6+ 3Si -2W -3SiF 4 . At this time,
W does not grow on the glabella insulating film 3. This reaction proceeds until the silicon film 5 is exhausted. The thickness of W is approximately several hundred people. Next, in FIG. 6, a gas containing wy6 and H2 (hydrogen) is caused to react. That is, WF6+3H2-W+
W is grown using the hydrogen ring reaction of 6HF↑. At this time, since hydrogen has the property of being adsorbed and ionized only on the metal surface, the above hydrogen ring reaction occurs through the contact hole (
It grows only from the side surface (where W is present) and the bottom surface (where there is Mu e) of the pier hole (4), and does not grow on the insulating film 3. At this time, even if the depth of the contact hole (pier hole) 4 is 1 μm or more, if the width of the contact hole 4 is 1 μm or less, W will grow from the side, so if the growth thickness is 5000 Å or less, the contact depth is 1 μm or more. Hall (beer hall)
4 will be completely embedded. Like this 600Q
Contact hole (pier hole) 4 with growth thickness less than Å
The growth time is short because it can be embedded. If the growth time is short, not only reaction by-products will not adhere to the insulator 3, but also W will not be deposited around the nuclei existing on the insulator 3. Therefore, selectivity is maintained and the contact hole (pier hole) 4 can be completely filled with W7. With the contact shown in FIG. 6, electrodes and wiring can be easily formed using a normal sputtering method.

In Figure 7, the first layer kl wiring 2 and the second layer mull wiring 8
Contact holes (pier holes) 4 and 4' are respectively opened in the
4. W7 and W9 are completely embedded in a'. Here, even though the depths of the 4.4' contact holes (pier holes) are different, if the method of the present invention is used, W can be completely buried at the same time as shown in Figure 7. . The reason for this is that W growth mainly occurs from the side of the contact hole (pier hole) 4.4', so if the width of the contact hole (pier hole) 4.4' is the same, the depth will be different. This is because W can be embedded at the same time.

Effects of the Invention As described above, according to the present invention, minute contact holes (pier holes) can be filled with metal using a simple method, so even if electrodes and wiring are formed, there will be no disconnection. It has a remarkable effect on improving reliability such as electromigration resistance.

Therefore, it becomes easy to realize a high-density, large-scale semiconductor integrated circuit.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of a fine contact according to an embodiment of the present invention, FIGS. 2 to 6 are process cross-sectional views for explaining the manufacturing process of the same fine contact, and FIG. 7 is a cross-sectional view of the present embodiment. FIG. 8 is a sectional view of a fine contact manufactured by a conventional manufacturing method. 1...Insulating film, 2...Mue wiring, 3.
......Interlayer isolation iL 4...--Contact hole (pier hole), 7...Contact hole (
Tungsten W0 embedded in a pier hole) Name of agent: Patent attorney Toshio Nakao and 1 other person No. 2
Figure 4 Figure 3 Figure 4 Figure 5 Figure 6

Claims (2)

[Claims] (1) A step of forming a contact hole for an electrode or wiring in an insulating film, a step of forming a thin semiconductor film or a film containing a metal only on the side surface of the contact hole, and a step of reacting a gas containing a metal to A method for manufacturing a semiconductor integrated circuit, comprising a step of selectively growing the above-mentioned metal only in contact holes. (2) The method of manufacturing a semiconductor integrated circuit according to claim 1, wherein metal is selectively grown in a plurality of contact holes having different depths.