JPS62140440A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPS62140440A JPS62140440A JP28158785A JP28158785A JPS62140440A JP S62140440 A JPS62140440 A JP S62140440A JP 28158785 A JP28158785 A JP 28158785A JP 28158785 A JP28158785 A JP 28158785A JP S62140440 A JPS62140440 A JP S62140440A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- main surface
- circuit substrate
- opposite main
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/144—Stacked arrangements of planar printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
Abstract
Description
【発明の詳細な説明】
（イ）産業上の利用分野
本発明は混成集積回路に関し、特に混成集積回路の折曲
げ構造の改良に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a hybrid integrated circuit, and more particularly to an improvement in the folding structure of a hybrid integrated circuit.
（ロ）従来の技術
従来の混成集積回路は第２図に示す如く、二枚の金属基
板（１１）（１２）と、基板（１１）（１２）を接続す
る絶縁フィルム（１３）と、フィルム（１３）上に設け
た導電路（１４）と、導電路（１４）上に固着した半導
体集積回路、チップ抵抗あるいはチップコンデンサー等
の複数の回路素子（１５）とを具備している。(B) Prior art As shown in Figure 2, a conventional hybrid integrated circuit consists of two metal substrates (11) (12), an insulating film (13) connecting the substrates (11) (12), and a film. (13) A conductive path (14) provided on the conductive path (14) and a plurality of circuit elements (15) such as a semiconductor integrated circuit, a chip resistor, or a chip capacitor fixed on the conductive path (14).
金属基板（１１）（１２）は０５〜１．□ｓ厚の良熱伝
導性のアルミニウムで形成きれ、エポキン樹脂等の接着
剤により基板（１１）（１２）を夫々の厚みだけ離間さ
せてポリイミド等の絶縁フィルム（１３）で接続する。The metal substrates (11) and (12) are 05 to 1. The substrates (11) and (12) are separated by their respective thicknesses and connected by an insulating film (13) made of polyimide or the like using an adhesive such as Epoquin resin.
絶縁フィルム（１３）の反対主面には導電路（１４）と
なる銅箔を貼着しておき、銅箔を選択的にエツチングし
て所望形状の導電路（１４）を形成する。A copper foil serving as a conductive path (14) is adhered to the opposite main surface of the insulating film (13), and the copper foil is selectively etched to form a conductive path (14) in a desired shape.
導電路（１４）は一方の基板（１２）の端部に外部リー
ド（１６）を半田付けするパッドを並へ、パッドから導
電路（１４）を絶縁フィルム（１３）上に延在させる。The conductive path (14) is parallel to the pad to which the external lead (16) is soldered to the end of one substrate (12), and the conductive path (14) extends from the pad onto the insulating film (13).
回路素子（１５）を固着する導電路（１４）の部分は両
方の基板（１１）（１，２）上に位置する様に設計し、
基板（１１）り１２）の離間部分には折曲げのために回
路素子＜１５）を設けない。The part of the conductive path (14) that fixes the circuit element (15) is designed to be located on both substrates (11) (1, 2),
No circuit elements <15) are provided in the separated portions of the substrates (11) and 12) due to bending.
回路素子（１５）を組み込んだ後、基板（１１）（１２
）の離間部分で絶縁フィルム（１３）を折曲げ基板（１
１）（１２）の夫々の反対主面をちょうど当接きせて外
部リード（１６）を残して全体を樹脂（１７）でモール
ドする。After incorporating the circuit element (15), the substrate (11) (12
) Fold the insulating film (13) at the spaced apart part of the board (1
1) The opposite main surfaces of (12) are just brought into contact with each other, and the entire body is molded with resin (17), leaving the external leads (16).
上述した技術は特願昭５５−１６９８６８号公報に記載
跡れている。The above-mentioned technique is described in Japanese Patent Application No. 169868/1983.
（ハ）発明が解決しようとする問題点
上述した如〈従来の技術では、基板の反対主面を当接さ
せた後、樹脂でモールドすることにより二枚の基板を接
着固定してたので、放熱作用が非常に悪くなる欠点があ
った。また、二枚の基板を接着する樹脂モールドにクラ
ンクが発生し接着力が弱くなる欠点があった。(c) Problems to be Solved by the Invention As mentioned above, in the conventional technology, two substrates were bonded and fixed by molding with resin after bringing the opposite main surfaces of the substrates into contact. There was a drawback that the heat dissipation effect was very poor. Additionally, there was a drawback that cranks were generated in the resin mold used to bond the two substrates, weakening the adhesive strength.
更にモールド工程を必要とするためにコスト高になる欠
点があった。Furthermore, since a molding process is required, there is a drawback that the cost is high.
（ニ）問題点を解決するための手段
本発明は上述した点に鑑みてなされたものであり、第１
図に示す如く、混成集積回路基板（１）上に回路素子（
５）を組み込んだ後に二枚の混成集積回路基板（１）（
２）間の絶縁フィルム（３）を折曲げそれぞれの基板（
１）（２）の反対主面が当接するように折曲げた後、混
成集積回路基板（１）上の少なくとも１カ所にプレスで
凹部（７）を設けて一体化する。(d) Means for solving the problems The present invention has been made in view of the above-mentioned points.
As shown in the figure, circuit elements (
After installing 5), two hybrid integrated circuit boards (1) (
2) Fold the insulating film (3) between each board (
1) After bending so that the opposite main surfaces of (2) are in contact with each other, a recess (7) is formed in at least one place on the hybrid integrated circuit board (1) by pressing, and the hybrid integrated circuit board (1) is integrated.
（＊）作用
この様に二枚の基板（１）（２）を折曲げ配置した後、
一方の混成集積回路基板（１）の少なくとも一ヵ所に凹
部（７）を形成することにより、凹部（７）を形成する
と同時に混成集積回路基板（１）上に設けた凹部（７）
の反対主面側に凸部（８）が形成きれ、その凸部（８）
がもう一方の混成集積回路基板（１）の反対主面側にめ
り込んで二枚の混成集積回路基板（１）（２）を接合し
て一体化できる。(*) Effect After bending and arranging the two boards (1) and (2) in this way,
By forming a recess (7) in at least one place on one hybrid integrated circuit board (1), the recess (7) is formed on the hybrid integrated circuit board (1) at the same time as the recess (7) is formed.
The convex part (8) is completely formed on the opposite main surface side, and the convex part (8)
The two hybrid integrated circuit boards (1) and (2) can be joined and integrated by sinking into the opposite main surface side of the other hybrid integrated circuit board (1).
（へ）実施例
以下に図面に示した実施例に基づいて本発明の詳細な説
明する。(F) Examples The present invention will be described in detail below based on the examples shown in the drawings.
第１図は本発明の実施例を示す混成集積回路である。FIG. 1 shows a hybrid integrated circuit showing an embodiment of the present invention.
本発明の混成集積回路は二枚の混成集積回路基！（１）
（２）と、基板（１）（２）を接続する絶縁フィルム（
３〉と、フィルム（３）上に設けた導電路（４）と、導
電路（４）上に固着した半導体集積回路、チップ抵抗あ
るいはチップコンデンサー等の複数の回路素子（５）と
を具備している。The hybrid integrated circuit of the present invention consists of two hybrid integrated circuit boards! (1)
(2) and the insulating film (
3>, a conductive path (4) provided on the film (3), and a plurality of circuit elements (5) such as a semiconductor integrated circuit, a chip resistor, or a chip capacitor fixed on the conductive path (4). ing.
混成集積回路基板（１）（２）は０．５〜１．０ｍ厚の
良熱伝導性のアルミニウムで形成され、エポキシ樹脂等
の接着剤により基板（１）（２）を夫々の厚みだけ離間
させて、その基板（１）（２）の主面上にポリイミド樹
脂等の絶縁フィルム（３）で接続する。絶縁フィルム（
３）上に導電路（４）となる銅箔を貼着しておき、その
銅箔を選択的にエツチングして所望形状の導電路（４）
を形成する。導電路（４）は一方の基板（２＞の端部に
外部リード（６）を半田付けするパッドを並へ、パッド
から導電路（４）を絶縁フィルム（３）上に延在させる
。回路素子〈５）を固着する導電路（４）の部分は両方
の基板＜１）（２）上に位置する様に設計し基板＜１＞
（２）の離間部分には折曲げのために回路素子＜５）を
設けない。The hybrid integrated circuit boards (1) and (2) are made of aluminum with good thermal conductivity and are 0.5 to 1.0 m thick, and the boards (1) and (2) are separated by their respective thicknesses using an adhesive such as epoxy resin. Then, an insulating film (3) made of polyimide resin or the like is connected to the main surfaces of the substrates (1) and (2). Insulating film (
3) A copper foil that will become the conductive path (4) is pasted on top, and the copper foil is selectively etched to form the conductive path (4) in the desired shape.
form. The conductive path (4) is parallel to the pad to which the external lead (6) is soldered to the end of one substrate (2>), and the conductive path (4) extends from the pad onto the insulating film (3).Circuit The part of the conductive path (4) that fixes the element (5) is designed to be located on both substrates (1) and (2).
No circuit element <5) is provided in the spaced apart portion (2) due to bending.
回路素子（５）を固着した後、混成集積回路基板（１）
（２）の離間部分の絶縁フィルム（３）を折曲げて混成
集積回路基板（１＞＜２＞の反対主面を当接させて混成
集積回路基板（１）に凹部（７）を設ける。四部（７）
は集積度を考慮して混成集積回路基板（１）の少なくと
も一カ所にプレスによって形成し、本実施例では混成集
積回路基板（１）の長手方向の側辺周辺の略中夫に設け
る。混成集積回路基板（１）の主面上に凹部（７）を形
成すると同時にその凹部（７）の反対主面側に凸部（８
）が形成される。その凸部（８）が形成きれると同時に
凸部（８）が混成集積回路基板（２）の反対主面にめり
込んで、混成集積回路基板（１）（２）を接合して一体
化する。After fixing the circuit elements (5), the hybrid integrated circuit board (1)
The insulating film (3) at the spaced apart portion (2) is bent and the opposite main surfaces of the hybrid integrated circuit board (1><2> are brought into contact with each other to form a recess (7) in the hybrid integrated circuit board (1). Part four (7)
are formed by pressing in at least one place on the hybrid integrated circuit board (1) in consideration of the degree of integration, and in this embodiment are provided approximately in the center around the longitudinal sides of the hybrid integrated circuit board (1). A concave portion (7) is formed on the main surface of the hybrid integrated circuit board (1), and at the same time a convex portion (8) is formed on the main surface opposite to the concave portion (7).
) is formed. As soon as the convex part (8) is completely formed, the convex part (8) sinks into the opposite main surface of the hybrid integrated circuit board (2), and the hybrid integrated circuit boards (1) and (2) are joined and integrated.
斯る本発明に依れば混成集積回路基板（１）（２）を折
曲げ配置した後、混成集積回路基板〈１）にプレスで凹
部（７）を設けると同時に反対主面に凸部（８）が形成
され、その凸部（８）が混成集積回路基板（２）の反対
主面側にめり込むことにより１．容易に二枚の混成集積
回路基板（１）（２）の一体化が行なえる。According to the present invention, after the hybrid integrated circuit boards (1) and (2) are bent and arranged, the recesses (7) are formed in the hybrid integrated circuit board (1) by pressing, and at the same time, the convex parts (7) are formed on the opposite main surface. 8) is formed, and the convex portion (8) sinks into the opposite main surface side of the hybrid integrated circuit board (2), whereby 1. The two hybrid integrated circuit boards (1) and (2) can be easily integrated.
（ト）発明の効果
上述の如く本発明に依れば二枚の混成集積回路基板を折
曲げ配置した後、一方の混成集積回路基板上にプレスで
凹部を設けると同時にその凹部が設けられた反対主面に
凸部が形成され、その凸部がもう一方の混成集積回路基
板の反対主面にめり込むことにより極めて容易に折曲げ
構造の混成集積回路が提供できる。(G) Effects of the Invention As described above, according to the present invention, after two hybrid integrated circuit boards are bent and arranged, a recess is formed on one of the hybrid integrated circuit boards by pressing, and at the same time the recess is formed. A convex portion is formed on the opposite main surface, and the convex portion is sunk into the opposite main surface of the other hybrid integrated circuit board, thereby making it possible to provide a hybrid integrated circuit with a folded structure very easily.
また従来と違って樹脂モールドを必要としないので放熱
性にも優れ且つコスト的にも安価で製造することができ
る。Moreover, unlike the conventional method, a resin mold is not required, so it has excellent heat dissipation properties and can be manufactured at low cost.
第１図は本発明の実施例を示す断面図、第２図は従来例
を示す断面図である。
（１）（２）・・・混成集積回路基板、 （３）・・・
絶縁フィルム、 （４）・・・導電路、 （５）・・
・回路素子、 （６）・・・外部リード、 （７）・・
・凹部。 （８）・・・凸部。
出願人 三洋電機株式会社 外１名
代理人 弁理士 佐 野 静 夫
第１図FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional example. (1)(2)...Hybrid integrated circuit board, (3)...
Insulating film, (4)... conductive path, (5)...
・Circuit element, (6)...external lead, (7)...
・Concavity. (8)...Protrusion. Applicant Sanyo Electric Co., Ltd. and one other agent Patent attorney Shizuo Sano Figure 1
Claims (1)
積回路基板の反対主面を接する様に折曲げた混成集積回
路に於いて、前記一方の混成集積回路基板主面の少なく
とも一ヵ所にプレスで凹部を設け、該凹部が設けられる
と同時に反対主面に設けられた凸部が前記もう一方の混
成集積回路基板にめり込んで前記二枚の混成集積回路基
板を接合し一体化することを特徴とした混成集積回路。(1) In a hybrid integrated circuit in which two hybrid integrated circuit boards separated and bonded by an insulating film are bent so that their opposite main surfaces touch, at least one place on the main surface of one of said hybrid integrated circuit boards A concave portion is formed by pressing on the substrate, and at the same time as the concave portion is provided, a convex portion provided on the opposite main surface sinks into the other hybrid integrated circuit board to join and integrate the two hybrid integrated circuit boards. A hybrid integrated circuit featuring
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28158785A JPS62140440A (en) | 1985-12-13 | 1985-12-13 | Hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28158785A JPS62140440A (en) | 1985-12-13 | 1985-12-13 | Hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62140440A true JPS62140440A (en) | 1987-06-24 |
Family
ID=17641229
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28158785A Pending JPS62140440A (en) | 1985-12-13 | 1985-12-13 | Hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62140440A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0329459A2 (en) * | 1988-02-18 | 1989-08-23 | Neal Castleman | Moulded chip carrier |
-
1985
- 1985-12-13 JP JP28158785A patent/JPS62140440A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0329459A2 (en) * | 1988-02-18 | 1989-08-23 | Neal Castleman | Moulded chip carrier |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR970008447A (en) | Integrated circuit assembly incorporating an anisotropic electrically conductive layer and method of manufacturing the same | |
| KR101271283B1 (en) | Power Semiconductor Module | |
| JPS6011809B2 (en) | hybrid integrated circuit | |
| JP2003124262A5 (en) | ||
| US9131617B2 (en) | Electrical component | |
| JPS62140440A (en) | Hybrid integrated circuit | |
| JPH0442937Y2 (en) | ||
| JPH0442938Y2 (en) | ||
| JPH043500Y2 (en) | ||
| JPH0445253Y2 (en) | ||
| JPS62149144A (en) | Hybrid integrated circuit | |
| JPH0423323Y2 (en) | ||
| JPH0440277Y2 (en) | ||
| JP2954559B2 (en) | Wiring board electrode structure | |
| JPH0617317Y2 (en) | Connection structure of hybrid integrated circuit | |
| JPS6341054A (en) | Bonding method of hybrid integrated circuit | |
| JPH11134467A (en) | Film for holding electronic parts and its manufacture | |
| JPS62149146A (en) | Hybrid integrated circuit | |
| JPH02110990A (en) | Hybrid integrated circuit | |
| JPS62149145A (en) | Hybrid integrated circuit | |
| JPS62149147A (en) | Hybrid integrated circuit | |
| JPS62140496A (en) | Bonding of hybrid integrated circuit | |
| JP2739349B2 (en) | Substrate for mounting electronic components | |
| JPH1145905A (en) | Contact conversion structure for ic chip and method of forming the same | |
| JP3698155B2 (en) | Semiconductor device and manufacturing method thereof, electronic module, and electronic apparatus |