JPS62136044A - Manufacture of three-dimensional integrated circuit - Google Patents

Abstract

PURPOSE:To obtain a uniform interlayer insulating film at low temperature, by putting an Al film on a lower layer having an active region, irradiating it under an oxygen atmosphere to be converted into Al2O3, and thereon producing a single crystal silicon layer to form an active region on an upper layer. CONSTITUTION:An Al film 6 is formed all over the surface of a gate oxide film 5 piled on a field oxide film 4. Then, O2 gas is ionized on a substrate surface with far ultraviolet rays of high density by scanning beams of synchro tron radiating beam 14 and O ions are accelerated to strike on the Al film 6 by impressing a DC bias between electrode plates 8 ad 9, to oxidize Al from the surface. Polycrystal silicon is piled on an Al2O3 film 61 and the surface is irradiated with laser beam to be annealed, so that solid phase epitaxy is generated to obtain a silicon single crystal layer 16. Opening parts are made on the oxidizing film 4 and Al2O3 film 6, to provide an upper layer wiring 32 being in contact with a lower layer wiring 31 and to cover it with a passivation film 17 so that a three-dimensional integrated circuit of two-layered structure can be obtained. Hence, a uniform insulating film can be obtained at low temperature.

Description

[Detailed description of the invention] [Technical field to which the invention pertains]

The present invention relates to a method for manufacturing a three-dimensional integrated circuit having a so-called Sol structure in which silicon single crystal active regions are stacked in multiple layers with an insulator interposed therebetween.

[Prior art and its problems]

In order to increase the degree of integration of integrated circuits, active regions are formed in multiple layers to achieve three-dimensionality. In conventional three-dimensional integrated circuits, polycrystalline silicon is laminated via a silicon oxide film on a silicon single crystal that has formed an active region, and the silicon single crystal is made into a single crystal by laser annealing.
It was manufactured by the method of forming a castle. However, with this method, there is a risk that the characteristics of the active region that has already been formed may be damaged due to thermal effects during single crystallization of polycrystalline silicon, and the adhesion strength between the silicon oxide film and the single crystal silicon on it may not be sufficient. There were also mechanical problems.

[Purpose of the invention]

The present invention solves the above-mentioned problems and provides a method for manufacturing a three-dimensional integrated circuit in which the upper layer of single crystal silicon and an insulator are compatible with each other, and which does not require a high amount of heat for single crystallization. purpose.

[Key points of the invention]

The present invention deposits an M film on a lower layer having an active region,
By irradiating light in an oxygen atmosphere and converting it into A7, O, and forming a single crystal silicon layer on top of it to form an upper active region, it becomes compatible with silicon and the deposited silicon becomes single crystal. A transparent M2O film can be easily produced as an insulating film, and the above objectives are achieved.

[Embodiments of the invention]

FIG. 1 shows an embodiment of the present invention, in which one
After forming, for example, a MOS FET 21 or wiring 31 as a layer element, an aluminum film 6 with a thickness of 1 Ina is formed on the entire surface of the gate oxide film 5 laminated on the field oxide film 4 by the bias spec method. This state is shown in FIG. 1(A). Next, such a substrate is set on an anode plate 9 facing a cathode plate 8 in a reaction tank 7 shown in FIG. 2, and heated with a heater 10. First, the inside of the reaction tank 7 is brought to a vacuum of 0.0 ITorr or less by the vacuum pump 11, and the mass flow 12 is used to make the inside of the reaction vessel 7 a vacuum of 0.0 ITorr or less. Gas 13 is introduced and 0.
After setting the temperature to approximately 1 Torr, synchrotron radiation light (SOR light) 14 having a wavelength of 800 to 900 is made incident through a lens 15 so as to be focused on the film 6 on the surface of the substrate 1 . The beam of the SOR light 14 is scanned to ionize the 02 gas on the substrate surface using high-density deep ultraviolet light, and a direct current bias is applied between the electrode plates 8 and 9 by the electric current 1II15 to accelerate the 0 ions to form the M film 6. As shown in Fig. 1, the M is oxidized from the surface.
The resulting A7. Polycrystalline silicon is deposited on the O, film 61 by a low pressure CVD method, and its surface is irradiated with laser light for annealing to generate solid phase epitaxial growth, thereby obtaining a silicon single crystal N16. Using this single crystal 1516 and the SiO □ film 5 formed by the CVD method, a MO3FET 22 is fabricated by a conventional method, and an opening is separately made in the oxide film 4 and the AI, O, film 6 to form an upper layer wiring 32 in contact with the lower layer wiring 31. After that, it is covered with a bassine film 17 to obtain a three-dimensional integrated circuit with a 2N structure. Similarly, it is also possible to obtain a three-dimensional integrated circuit with more layers.

【Effect of the invention】

The present invention uses AI, O,
This method uses a polycrystalline silicon film, deposits a polycrystalline silicon layer on top of it, produces single crystal silicon by solid phase epitaxy, and uses this single crystal silicon to form the upper active region.It has the following advantages. have 1. A uniform interlayer insulating film can be obtained at low temperature by using a sputtering film. 2. Polycrystalline silicon deposited on A7.03 is easy to adhere to and has high adhesion strength. 3. When polycrystalline silicon on Alzo3 is made into a single crystal, S
As is known from O8 technology, the crystal orientation is easily aligned and the energy required for single crystallization is small, so there is no thermal effect on the underlying active region.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view sequentially showing the steps of an embodiment of the present invention, and FIG. 2 is a cross-sectional view of an M film oxidation apparatus used in an embodiment of the present invention. l: silicon substrate, 21.22: MOSFET, 5:5
iflI membrane, 6: A/membrane, 6t: u tax membrane,
7: Reaction tank, 13: Ox gas, 14: SOR light, 1
6: Single crystal Si layer. Figure 1

Claims (1)

[Claims] 1) When stacking active regions of silicon single crystals in multiple layers via an insulator, an aluminum film is deposited on the lower layer containing the active region, and the layer is irradiated with light in an oxygen atmosphere to form an aluminum oxide film. 1. A method for manufacturing a three-dimensional integrated circuit, characterized in that a single crystal silicon layer is formed thereon to form an upper active region.