JPS6037724A - Manufacture of thin film semiconductor device - Google Patents

Manufacture of thin film semiconductor device

Info

Publication number
JPS6037724A
JPS6037724A JP14703383A JP14703383A JPS6037724A JP S6037724 A JPS6037724 A JP S6037724A JP 14703383 A JP14703383 A JP 14703383A JP 14703383 A JP14703383 A JP 14703383A JP S6037724 A JPS6037724 A JP S6037724A
Authority
JP
Japan
Prior art keywords
film
substrate
thin film
semiconductor device
film semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14703383A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP14703383A priority Critical patent/JPS6037724A/en
Publication of JPS6037724A publication Critical patent/JPS6037724A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Toxicology (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To obtain a film of no property variation in low cost attracting Na in a substrate to the back side of the substrate by applying negative electric field from the surface of the formed film to the direction of the bottom of the substrate in the forming of the semiconductor film and in the process of treatment which requires heating. CONSTITUTION:On a glass substrate 1, an SiO2 film 2 is coated on it, and an Si film 3 is deposited wherein laser is made to irradiated for annealing as follows. The substrate 1 is placed on a cathode 4 and on the upper surface of the film 3, an anode plate is installed. Between these electrodes, a direct currnet power source 5 is connected and negative electric field is applied from the film 3 to the direction of the substrate 1. In this construction, the film 3 is heated by annealing and thermal diffusion of Na ion in the substrate 1 to the direction of the film 2 is prevented and is directed to the back side of the substrate 1. This enables obtaining the film 3 which has stable characteristics in low cost.

Description

【発明の詳細な説明】 本発明I−1:薄膜半導体装置の製造方法に161する
DETAILED DESCRIPTION OF THE INVENTION The present invention I-1: A method for manufacturing a thin film semiconductor device.

従来、薄膜半導体装置1i、Nth含有のないサファイ
ヤ基板あるいは石英基板上に形成されて成るのが、加工
処理工程中にNa汚染がなく、特性が安定するとの理由
から、通常であった。
Conventionally, the thin film semiconductor device 1i has usually been formed on a sapphire substrate or a quartz substrate that does not contain Nth because there is no Na contamination during the processing process and the characteristics are stable.

しかし、上記従来技術によると、サファイヤ基板や石英
基板のコストが茜く、薄膜半導体装置の本発明は、かか
る従来技術の欠点をなくし、ガラス基板に薄膜半導体i
tを形成しても特性厚動かなく、低コストで薄膜半導体
装置を製造できる方法を提供することを目的とする。
However, according to the above-mentioned prior art, the cost of the sapphire substrate or the quartz substrate is expensive, and the present invention of the thin film semiconductor device eliminates the drawbacks of the prior art, and the thin film semiconductor i
It is an object of the present invention to provide a method for manufacturing a thin film semiconductor device at low cost without changing the characteristic thickness even if the thickness is formed.

上記目的を連成するための本発明の基本的な構成は、薄
膜半導体装置の製造方法に関し、ガラス基板上の生導体
膜生成および加熱を伴う加工、処理工程等に於て、半導
体膜が形成される面からガラス基板底面に向けて負の電
界を開力nしつつ、前記力0工、処理全施すことを特徴
とする。
The basic structure of the present invention to achieve the above objects is related to a method for manufacturing a thin film semiconductor device, in which a semiconductor film is formed in processing and processing steps that involve production and heating of a raw conductor film on a glass substrate. The process is characterized in that the entire process is performed with zero force while applying a negative electric field from the surface to the bottom surface of the glass substrate.

以下、実施例により本発明を詳述する。Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の一実施例を示す薄膜半導体装置の加工
・処理法、の模式図である。い丑、ガラス基板1上に5
io2B’A2を形D!l、、その上にSi膜6を形成
し、該Si膜5をレーザー・アニールでアニールする場
合に、ガラス基板1を陰極板4にのせ、Si膜5の上部
に陽擾板を設ける等して、電界をガラス基板底面に向幻
て負になるように電γ原から印加すると、レーザー、ア
ニール膜に加熱の方向に熱拡散するのを電界によりbt
aをガラス基板1の裏面側に引張って防止することがで
きる様子を示している。
FIG. 1 is a schematic diagram of a method of processing and processing a thin film semiconductor device showing an embodiment of the present invention. 5 on glass substrate 1
io2B'A2 is shaped like D! l. When a Si film 6 is formed thereon and the Si film 5 is annealed by laser annealing, the glass substrate 1 is placed on the cathode plate 4 and a positive plate is provided on the top of the Si film 5. When an electric field is applied from the electric gamma source so that it becomes negative toward the bottom surface of the glass substrate, the electric field causes bt to diffuse into the laser and annealed film in the direction of heating.
This figure shows how this can be prevented by pulling a to the back side of the glass substrate 1.

前記の如く、本発明によるとガラス基板上に特種の安定
な薄膜半導体装置を低コストで製作できる効果がある。
As described above, the present invention has the advantage that a particularly stable thin film semiconductor device can be manufactured on a glass substrate at low cost.

本発明は薄膜半導体装置の製造工程におけるレーザー、
アニール工程に限らず、c V D 5jO211M形
成工程、AL蒸看工程、ウェット、及びドライエンチン
グ工程、ベーキング工程等。物理的あるいは化学的処理
工程の全工程V(適用できるばかりでなく、必ずしも加
熱工程のみならず常温での処理工程にも適用できる。
The present invention relates to a laser used in the manufacturing process of a thin film semiconductor device,
Not limited to annealing process, but also cVD5jO211M forming process, AL vaporizing process, wet and dry etching process, baking process, etc. Not only can it be applied to all physical or chemical treatment steps (V), but it can also be applied not only to heating steps but also to treatment steps at room temperature.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す薄膜半導体装置製造の
一処理工程の模式図である。 1・・・・・・ガラス基板、2・・・・・・sio、、
lE4.6・・・・・・5102膜、 4・・・・・・
陰極膜、5・・・・・・電υ車。 A?) ↓ 易 1 1ffl
FIG. 1 is a schematic diagram of one processing step of manufacturing a thin film semiconductor device showing an embodiment of the present invention. 1... glass substrate, 2... sio,,
lE4.6...5102 membrane, 4...
Cathode membrane, 5...Electric train. A? ) ↓ Easy 1 1ffl

Claims (1)

【特許請求の範囲】[Claims] (1) ガラス基板上の半導体11@生成および加!J
l:伴う加工、処理工程等に於て、半導体膜が形成され
る面からガラス基板底面に向けて負の電界を印加しつつ
、前記加工、処理を柿すことを1特徴とする薄膜半導体
装置の製造方法。
(1) Semiconductor 11@generation and addition on glass substrate! J
l: A thin film semiconductor device characterized in that during the associated processing, processing, etc., a negative electric field is applied from the surface on which the semiconductor film is formed to the bottom surface of the glass substrate. manufacturing method.
JP14703383A 1983-08-10 1983-08-10 Manufacture of thin film semiconductor device Pending JPS6037724A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14703383A JPS6037724A (en) 1983-08-10 1983-08-10 Manufacture of thin film semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14703383A JPS6037724A (en) 1983-08-10 1983-08-10 Manufacture of thin film semiconductor device

Publications (1)

Publication Number Publication Date
JPS6037724A true JPS6037724A (en) 1985-02-27

Family

ID=15421011

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14703383A Pending JPS6037724A (en) 1983-08-10 1983-08-10 Manufacture of thin film semiconductor device

Country Status (1)

Country Link
JP (1) JPS6037724A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07321364A (en) * 1995-04-28 1995-12-08 Semiconductor Energy Lab Co Ltd Semiconductor device
US6043105A (en) * 1985-05-07 2000-03-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor sensitive devices
KR100361204B1 (en) * 1999-12-22 2002-11-18 주식회사 하이닉스반도체 Method of manufacturing a semiconductor device
JP2008251287A (en) * 2007-03-29 2008-10-16 Japan Steel Works Ltd:The Crystallization method and crystallization device of thin film

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6043105A (en) * 1985-05-07 2000-03-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor sensitive devices
JPH07321364A (en) * 1995-04-28 1995-12-08 Semiconductor Energy Lab Co Ltd Semiconductor device
KR100361204B1 (en) * 1999-12-22 2002-11-18 주식회사 하이닉스반도체 Method of manufacturing a semiconductor device
JP2008251287A (en) * 2007-03-29 2008-10-16 Japan Steel Works Ltd:The Crystallization method and crystallization device of thin film
JP4656441B2 (en) * 2007-03-29 2011-03-23 株式会社日本製鋼所 Method and apparatus for crystallizing thin film

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