JPS62135449U - - Google Patents

Description

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a chip used in a shot barrier semiconductor device which is an embodiment of the present invention, FIG. 2 is a sectional view of a chip used in a conventional shot barrier semiconductor device, and FIG. 3 is a sectional view of a chip used in a conventional shot barrier semiconductor device. The equivalent circuit diagram, FIG. 4, is a schematic diagram when a chip used in a shot barrier semiconductor device is mounted on a lead frame. 1 is a semiconductor chip, 2 is a semiconductor substrate, 3 is an epitaxial layer, 4 is an isolation region, 5 is an island region, 6 is a guard region, 7 is a contact region, 8 is a barrier metal electrode, 9, 10, 11 are electrodes, 12 is a substrate support plate.

Claims (1)

[Scope of utility model registration request] a semiconductor substrate of at least one conductivity type; an epitaxial layer of an opposite conductivity type laminated on the semiconductor substrate; an isolation region of one conductivity type forming a plurality of island regions in the epitaxial layer; A guard region and a contact region to be formed, a barrier metal electrode to be formed between the guard regions,
a first electrode connecting the one contact region and the other barrier metal electrode, a second electrode connecting the other contact region, and a third electrode connecting the one barrier metal electrode; A shot barrier semiconductor device comprising first to third leads electrically connected to the first to third electrodes, respectively, and a substrate support plate to which the semiconductor substrate is fixed.