JPS60144255U - transistor - Google Patents

transistor

Info

Publication number
JPS60144255U
JPS60144255U JP2944884U JP2944884U JPS60144255U JP S60144255 U JPS60144255 U JP S60144255U JP 2944884 U JP2944884 U JP 2944884U JP 2944884 U JP2944884 U JP 2944884U JP S60144255 U JPS60144255 U JP S60144255U
Authority
JP
Japan
Prior art keywords
layer
semiconductor substrate
region
transistor
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2944884U
Other languages
Japanese (ja)
Inventor
和夫 山岸
Original Assignee
関西日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 関西日本電気株式会社 filed Critical 関西日本電気株式会社
Priority to JP2944884U priority Critical patent/JPS60144255U/en
Publication of JPS60144255U publication Critical patent/JPS60144255U/en
Pending legal-status Critical Current

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Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は従来のトランジスタの断面図及び等
価回路図、第3図及び第4図は本考案の一実施例を示す
断面図及び等価回路図、第5図乃至第9図は第3図のト
ランジスタの製造例を示す各工稈での断面図である。,
1 and 2 are a sectional view and an equivalent circuit diagram of a conventional transistor, FIGS. 3 and 4 are a sectional view and an equivalent circuit diagram showing an embodiment of the present invention, and FIGS. 5 to 9 are FIG. 4 is a cross-sectional view of each culm showing an example of manufacturing the transistor shown in FIG. 3; ,

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] コレクタ領域となる一導電型半導体基板に不純物゛選択
拡散でベース領域とエミツタ領域を順次に形成したもの
において、前記半導体基板の裏面にポリシリコン層によ
る抵抗.層と、電極引出層とを積層形成したことを特徴
とするトランジスタ。
A base region and an emitter region are sequentially formed by selective diffusion of impurities on a semiconductor substrate of one conductivity type, which serves as a collector region, and a resistor is formed by a polysilicon layer on the back surface of the semiconductor substrate. A transistor characterized in that a layer and an electrode extraction layer are laminated.
JP2944884U 1984-02-29 1984-02-29 transistor Pending JPS60144255U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2944884U JPS60144255U (en) 1984-02-29 1984-02-29 transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2944884U JPS60144255U (en) 1984-02-29 1984-02-29 transistor

Publications (1)

Publication Number Publication Date
JPS60144255U true JPS60144255U (en) 1985-09-25

Family

ID=30528262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2944884U Pending JPS60144255U (en) 1984-02-29 1984-02-29 transistor

Country Status (1)

Country Link
JP (1) JPS60144255U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6439769A (en) * 1987-08-06 1989-02-10 Fuji Electric Co Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6439769A (en) * 1987-08-06 1989-02-10 Fuji Electric Co Ltd Semiconductor device

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