JPS62134769A - Automatic wiring path determining method - Google Patents

Abstract

PURPOSE:To execute the wiring of nets of different voltage levels on the same layer, and to curtail the number of layers of a wiring board, by determining a wiring inhibited area by the existing wiring and avoiding the wiring to this area, so that a wiring of the succeeding different kind signal net does not become adjacent within a prescribed interval to the existing wiring. CONSTITUTION:Two kinds of nets of different voltage levels are mixed on a wiring layer, and as for a wiring pattern 5 of a voltage level I, the wiring is executed prior to a wiring pattern 6 of a voltage level II, and at the time of wiring of the net of the voltage level II, a wiring inhibited area is inputted as a wiring inhibited area data being a part of an oblique line in accordance with a designation from the outside. The wiring pattern 6 of the voltage level II is brought to wiring by avoiding the wiring inhibited area, therefore, as a result, the pattern 5 of the voltage level I and the wiring pattern 6 of the voltage level II can always be brought to wiring by keeping an interval exceeding a prescribed value alpha. In this way, a problem of a crosstalk is dissolved, the nets of different voltage levels are mixed on the same layer, and the number of layers of a wiring board can be curtailed.

Description

[Detailed description of the invention] Relating to a route determination method.

[Conventional technology]

In the conventional automatic wiring route determination method, the wiring route is determined on the condition that the wires do not intersect with each other.

[Problem that the invention seeks to solve]

In the conventional automatic wiring route determination method described above, when signal nets of different types and pressure levels that must be separated for a certain period of time are distributed on the same wiring layer, it is impossible to wire them with a distance greater than the specified interval, resulting in cross). This poses a problem in that it is necessary to separate wiring layers for each voltage level, and an expensive multi-layer wiring board is required.

[Means for solving problems]

The method of the present invention provides circuit network information including connection information and voltage level t# information for each of a plurality of circuit networks that require interconnection to a plurality of partial circuit networks fR for each voltage level based on the voltage level information. a first step of dividing into information, a step @2 of extracting first partial network information from the plurality of partial network information and determining a corresponding wiring route; a third step of determining a wiring prohibited area corresponding to the wiring route created and creating wiring prohibited area data; and extracting second partial circuit network information from the plurality of partial circuit network information and creating the wiring prohibited area data in the third step. a fourth step of determining a wiring route corresponding to the second partial circuit network information by referring to the wiring prohibited area data, and repeating the third step and the fourth step to The process includes the step @5 of determining a wiring route corresponding to all of the circuit m information.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a flowchart showing an embodiment of the present invention, in which arrows drawn with solid lines indicate the flow of processing, and arrows drawn with broken lines indicate the flow of data.

First, a netlist 1 consisting of circuit information including interconnection information 2 of a plurality of signal circuit networks (hereinafter referred to as nets) and voltage level information is divided into a plurality of partial nets according to voltage levels.
Divide into J st 2 (step 11). Next, all nets included in the partial netlist 2 are routed for the first partial netlist 2 (step 12).
.

Next, the wiring is routed based on the value specified externally for each line segment that constitutes the wiring route of the wiring result 3 obtained (the minimum distance that the wiring must maintain, this is determined from the allowable crosstalk value). Determine the prohibited area and create wiring prohibited area data 4 for the wiring of the IJ strike 2 (step /4>).

For the wiring of the second and subsequent partial netlists 2, the wiring is performed after importing the wiring prohibition data 4 of the immediately preceding wiring result (cumulative result) 3 until there are no subsequent partial netlists 2 of different voltage levels. , repeat the above process cyclically. By performing a series of processes as described above, it is possible to wire signal nets of different voltage levels with intervals of a certain value or more.

Next, an application example of this embodiment will be explained with reference to FIG. 2.

Two types of nets with different voltage levels coexist in the wiring layer shown in FIG. When wiring the net, the wiring prohibited area is imported as the diagonally shaded area in the figure as the wiring prohibited area data according to the external designation.Wiring pattern 6 of voltage level ■ is routed while avoiding the wiring prohibited area. As a result, the wiring pattern 5 of voltage level I and the wiring pattern 6 of voltage level H can always be wired with an interval of a constant value α or more.As a result, the crosstalk problem is solved, and the voltage By mixing nets of different levels on the same layer, the number of layers of the wiring board can be reduced.

〔Effect of the invention〕

As explained above, the present invention has three steps in determining wiring routes for nets that require wiring, and when signal nets of different voltage levels coexist, the wiring is divided into signal nets of the same voltage level, and the same type of signal nets are connected. The wiring has been completed and there is a difference 4
Before starting the wiring of heavy signal nets, to ensure that the wiring of subsequent dissimilar signal nets does not adjoin existing wiring within a certain distance, determine the area where wiring is prohibited by existing wiring and avoid wiring to this area. This makes it possible to wire nets with different voltage levels on a single layer, and has the effect of reducing the number of layers on the wiring board.

[Brief explanation of drawings]

FIG. 1 is a flow chart showing one embodiment of the present invention, and FIG. 2 is a wiring pattern diagram showing an application example of the present invention. 1... Netlist, 2... Partial netlist, 3... Routing results, 4... Routing prohibited area data, 5°゛°°゛° Wiring turn for voltage level ■, 6... Wiring pattern for voltage level ■, 11, 12, 13.14... Steps in the flow chart. Agent Patent Attorney Minahaya Uchihara 1 Figure

Claims (1)

[Claims] Circuit network information including connection information and voltage level information for each of a plurality of circuit networks that require interconnection is divided into a plurality of partial network information for each voltage level based on the voltage level information. a first step of extracting first partial circuit network information from the plurality of partial circuit network information and determining a wiring route for it; The third step is to determine the wiring prohibited area and create wiring prohibited area data.
extracting second partial circuit network information from the plurality of partial circuit network information and referring to the wiring prohibited area data created in the third step to correspond to the second partial circuit network information; a fourth step of determining a wiring route; and a fifth step of repeatedly performing the third and fourth steps to determine a wiring route corresponding to all of the plurality of partial circuit network information. An automatic wiring route determination method characterized by: