JPS62129884A - Display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a display device having a bitmap memory, and particularly to a display device having a bitmap memory, and particularly to a display device having a bitmap memory that enables memory-to-memory conversion in the bitmap memory with a small amount of hardware. Related to display devices.

[Technical background of the invention and its problems]

With the development of man-machine interfaces, the display, which is the core of the interface, is required to have increasingly sophisticated functions. A typical example is the realization of a pit map system that not only outputs text, but also outputs a free combination of text, figures, and images. Workstations equipped with these functions have bitmap memory and can display kanji as graphics. In order to execute such graphics display at high speed, it is essential to move data such as characters, figures, images, etc. distributed in the main memory to the bitmap memory. Therefore, read/modify/write transfer is performed between the main memory and the bitmap memory, and during transfer, logical operations can be performed on the memory contents of the transfer destination in units of dots.

By the way, regarding the read-modify-write transfer described above, in the prior art, for example, transfer from the main memory to the bitmap memory, or from the microprocessor to the bitmap memory was possible. However, from the bottle to the bitmap memory between different addresses, so-called memory
Memory-to-memory transfers cannot be performed directly, so
It was not possible to directly perform logical operations on a dot-by-dot basis between bitmap memories.

[Purpose of the invention]

The present invention has been made based on the above-mentioned circumstances, and an object of the present invention is to provide a display device r capable of further increasing the speed of graphic display by adding a small amount of hardware.

[Summary of the invention]

In a display device having a bitmap memory, the present invention provides a bypass means for returning output data from the bitmap memory to the bitmap memory without going through an arithmetic processing unit, and a selection switch for optionally enabling this bypass means. Memory-to-memory transfer in a bitmap memory is realized by providing a means for this.

This enables memory-to-memory transfer even between bitmap memories, and when transferring operations,
Logical operations can be performed directly on the memory contents of the transfer destination on a dot-by-dot basis, allowing faster graphics display.

[Examples of actual inventions]

An example of the present invention will be described below with reference to the drawings. 1st
The figure is a block diagram showing an example of a device according to the invention. In the figure, IZ is a microprocessor (μP) that controls the device, and z2 is a DMA device that controls data movement within the device independently of the microprocessor 11. Reference numeral 14 denotes an address control 4 (MAC) for supplying the bitmap memory 17. Reference numeral 15 denotes a bitmap memory for controlling logical operations on the data written by the microprocessor X1 to the bitmap memory Z7 and data read from the bitmap memory Z7 and the bit position of the data to be written in order to execute read modify write. Collateral g (BMC). A multiplexer (MPX) 16 receives data output from the bitmap memory control section 15 and data directly output from the bitmap memory 17, and selects one of them according to instructions from the microprocessor 11.

17 is a bit map memory (BMM); Z8 and 28 are selectors (B8) that select and output the output of the bit map memory I7 by a predetermined width according to the output of the address control section 14;
BL, BSEL2), 19 and 29 are registers (REG, RI) that temporarily hold the output of bitmap memory z7.
G, ), 20 is a bitmap memo IJ for display
A parallel/serial converter (P-8) converts the data extracted from f7 into a bit serial signal, and 2Z is a display device such as a CRT. 22 is a selector. The selector 22 receives the 16-bit system data bus (D-BO2) and the output of the selector 28 as inputs, and selectively outputs data from either one to the bitmap memory control section 15. or,
101 is a 16-pit system data bus (D-B
O2), 102 is an address path (A-BUS).

Hereinafter, the operation of a practical example of the present invention will be explained in detail using FIG. Memory in bitmap memory I7
The operation when read-modify-write source data (transfer source) to destination (transfer destination) in two-memory transfer is shown below. In this case, selector 22
is set to select data available via selector 28, and multiplexer 16 is set to select data from bitmap memory controller I5. First, a source address is output from the address control section I4, thereby reading source data from the bitmap memory I7. Furthermore, source data is held in the register 29. The valid bits of the held source data are selected by the selector 28, and the valid data is supplied via the selector 22 to the bitmap memory control section Z5.

On the other hand, the destination data is stored in the address control section Z.
The destination address is output from 4, and the destination data is read from the bitmap memory 17. Furthermore, destination data is held in the register 19. From the held destination tree-i/wn data, data with an effective bit length is selected via the selector 18, and the data is sent to the bitmap memory control unit I5.
is supplied to

The source data and destination data supplied to the bitmap memory controller 15 are subjected to bit-by-bit operations in the map memory controller I5, and are supplied to the bitmap memory I7 through the multiplexer 16. The data supplied to the bitmap memory 17 is stored in the previously specified destination address position.

〔Effect of the invention〕

As explained above, according to the present invention, memory-to-memory read/modify/write transfer is possible not only between the main memory and the bitmap memory but also between different addresses of the bitmap memory. From, -1
- High-speed graphics display can be achieved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of the present invention. II...Microprocessor (μP) I2...DM
A device 13.19.29...Register (REG) I4...
Address control section (MAC) I5...Bitmap memory control section (BMC) I6...
...Multiplexer (MPX) I7...Bitmap memory (BMM) 18.28.
... Selector (B8RL) 20 ... Parallel-serial converter (P
-8) 2Z...Display 22...Selector (8BL) Applicant's agent Patent attorney Takeshi Suzue Figure 1

Claims (1)

[Claims] A bitmap memory, each register that temporarily holds the source data and destination data obtained from this bitmap memory, and the temporarily held source data and destination data from any bit position in units of bit width of the system bus. and a second selection means that selects and outputs either one of the source data output from the first selection means and the data externally applied via the system bus. a selection means; an arithmetic means for performing bit arithmetic processing on the data output by the second selection means and the destination data which is the output of the first selection means; and the data output from the arithmetic means and the bitmap. and third selection means that receives the data output from the memory, selects one of them, and supplies the data to the bitmap memory, and the third selection means is arbitrarily switched by external instruction information. . A display device, wherein the output data of the register is directly rewritten into the bitmap memory via the selection means to implement a read-modify-write operation.