JPS6212986A - Package of magnetic bubble memory device - Google Patents

Package of magnetic bubble memory device

Info

Publication number
JPS6212986A
JPS6212986A JP60150272A JP15027285A JPS6212986A JP S6212986 A JPS6212986 A JP S6212986A JP 60150272 A JP60150272 A JP 60150272A JP 15027285 A JP15027285 A JP 15027285A JP S6212986 A JPS6212986 A JP S6212986A
Authority
JP
Japan
Prior art keywords
pattern
ceramic plate
shield
bubble memory
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60150272A
Other languages
Japanese (ja)
Inventor
Yoshitaka Terashi
寺師 由隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60150272A priority Critical patent/JPS6212986A/en
Publication of JPS6212986A publication Critical patent/JPS6212986A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To adjust a bias magnetic field supplied to a bubble memory chip surface with use of a magnet by providing through holes for connecting a shield pattern and a pattern for an earth formed on a peripheral surface of a ceramic plate of the rear side on a printed circuit board and its rear side ceramic plate. CONSTITUTION:Shield pattern 2a, 2b formed on a ceramic plate 1 of the first layer and shield patterns 11a, 11b formed on a ceramic plate 10 of the third layer are connected by through holes 3a-3c and the shield pattern 11a, 11b formed on the ceramic plate of the third layer are connected to a pattern 8 for an earth through through holes 9a, 9b. Thereby, the shield patterns 2a, 2b, 11a, 11b performing a magnetic shield with respect to a vertical component generating a driving coil for a rotating magnetic field are used also as the pattern for the earth, so that a whole of the package is made compact and a vertical magnetic field generated in the driving coil can be made small by a magnetic shield effect.

Description

【発明の詳細な説明】 (発明の利用分野) 本発明は磁気バブルメモリデバイスのパッケージとくに
デバイスに実装される基板の薄形化およびデバイス自体
の小形化に好適で、回転磁界の垂直成分をシールド可能
な磁気バブルメモリチップスのパッケージに関するもの
である。
Detailed Description of the Invention (Field of Application of the Invention) The present invention is suitable for reducing the thickness of a magnetic bubble memory device package, particularly the substrate mounted on the device, and miniaturizing the device itself, and is suitable for shielding the perpendicular component of a rotating magnetic field. The present invention relates to a possible package of magnetic bubble memory chips.

(発明の背景) 従来の磁気バブルメモリデバイスのシングルチップ用デ
バイスにおいては、たとえばオーム社発行の「磁気バブ
ル」第134頁に紹介されている如く、チップをプラス
チックまたはセラミックで形成されたプリント配線基板
にダイボンデインクしたままで、回転磁界の垂直成分を
シールドする効果についての配慮がなされていないもの
である。そのため、導体に交流磁界などの時間的に変化
する磁束が鎖交したとき、うず電流が流れてうず電流積
が発生する。とくに強磁性体の場合には、磁束が大きい
ので、うず電流損失の他にうず電流による磁界によって
磁化の変化がさまたげられる表皮効果が発生し、この表
皮効果により、今μを導体の導磁率、ωを角振動数、σ
を導体の導電率、fを周波数とすると、磁化の変化が導
体の表面の1/、になる厚で減衰する。そのため、通常
の強磁性体の銅パターンを用いて、一方のパターンをア
ースして上下をはさみこんでも銅パターンのままではア
ースとして利用できても回転磁界発生用駆動コイルによ
って発生する鎖交磁束によってうず電流損失が犬きく、
表皮効果によって磁化の変化が減衰し回転磁界がさまた
げられチップの動作マージン等に影響を与えることにな
ってしまう欠点がある。またチップの容量が犬きくなり
配線パターン数が多くなると基板の片面しか使えない場
合、基板全体が犬きくなり、磁気バブルデバイスが大形
化する欠点を有する。
(Background of the Invention) In conventional single-chip magnetic bubble memory devices, the chip is mounted on a printed wiring board made of plastic or ceramic, as introduced in "Magnetic Bubble" published by Ohm Co., Ltd., page 134, for example. However, no consideration has been given to the effect of shielding the perpendicular component of the rotating magnetic field. Therefore, when a conductor is interlinked with a time-varying magnetic flux such as an alternating magnetic field, eddy currents flow and an eddy current product occurs. In particular, in the case of ferromagnetic materials, the magnetic flux is large, so in addition to eddy current loss, a skin effect occurs in which changes in magnetization are hindered by the magnetic field caused by eddy currents, and due to this skin effect, μ can now be changed to the magnetic permeability of the conductor, ω is the angular frequency, σ
When is the conductivity of the conductor and f is the frequency, the change in magnetization is attenuated at a thickness that is 1/1 of the surface of the conductor. Therefore, even if you use a normal ferromagnetic copper pattern and sandwich the top and bottom with one pattern grounded, the copper pattern can still be used as a ground, but due to the linkage magnetic flux generated by the rotating magnetic field generation drive coil. Eddy current loss is significant,
There is a drawback that the change in magnetization is attenuated due to the skin effect, which impedes the rotating magnetic field and affects the operating margin of the chip. Furthermore, when the capacitance of the chip becomes large and the number of wiring patterns increases, if only one side of the board can be used, the entire board becomes small and the magnetic bubble device becomes larger.

(発明の目的) 本発明は、前記従来の欠点を除去し、バブルメモリチッ
プ面に供給するバイアス磁界を磁石を用いて正確に調整
可能とする磁気バブルメモリデバイスのパッケージを提
供することにある。
(Object of the Invention) An object of the present invention is to provide a package for a magnetic bubble memory device that eliminates the above-mentioned conventional drawbacks and allows accurate adjustment of the bias magnetic field supplied to the bubble memory chip surface using a magnet.

(発明の概要) 本発明は前記の目的を達成するため、磁気バブルメモリ
チップ実装用としてセラミックで形成されたプリント基
板を介挿する如く複数個のセラミック板を設け、上記プ
リント基板にバブルメモリチップと、このバブルメモリ
チップに接続し、該プリント基板の表裏両面に連らなる
如く接続する配線パターンと、アース用パターンとを設
け、上記複数個のセラミック板およびプリント基板に核
複数個のセラミック板の周面に形成されたシールドパタ
ーンを接続するスルーホールを設け、上記プリント基板
およびその裏面側セラミック板に該裏面側セラミック板
の周面に形成された上記シールドパターンと、上記アー
ス用パターンとを接続するスルーホールを設けたことを
特徴とするものである。
(Summary of the Invention) In order to achieve the above-mentioned object, the present invention provides a plurality of ceramic plates for mounting a magnetic bubble memory chip such that a printed circuit board made of ceramic is inserted therein, and the bubble memory chip is mounted on the printed circuit board. A wiring pattern and a grounding pattern are provided to be connected to the bubble memory chip and connected to both the front and back surfaces of the printed circuit board, and a plurality of core ceramic plates are connected to the plurality of ceramic plates and the printed circuit board. A through hole is provided to connect the shield pattern formed on the circumferential surface of the printed circuit board and the ceramic plate on the back side thereof, and the shield pattern formed on the circumferential surface of the ceramic plate on the back side and the grounding pattern are connected to the printed circuit board and the ceramic plate on the back side thereof. It is characterized by providing a through hole for connection.

(発明の実施例) 以下、本発明の実施例を示す第1図および第2図につい
て説明する。第1図は本発明の実施例を示す磁気バブル
メモリデバイスバノケージの斜視図、第2図は第1図の
A−A’矢視方向断面正面図にして、同図(、)は第一
層目のセラミック板を示し、同図(A)は第二層目のセ
ラミック板すなわち基板を示し、同図(c)は第3層目
のセラミック板を示す。同図において、1は第1層目の
セラミック板にして、通常の銅板よりも厚くしてその上
面および周面にシールドパターン2α。
(Embodiments of the Invention) Hereinafter, FIGS. 1 and 2 showing embodiments of the present invention will be described. FIG. 1 is a perspective view of a magnetic bubble memory device vanocage showing an embodiment of the present invention, FIG. 2 is a cross-sectional front view taken along the line A-A' in FIG. The first layer of the ceramic plate is shown, the figure (A) shows the second layer of the ceramic plate, that is, the substrate, and the figure (c) shows the third layer of the ceramic plate. In the figure, reference numeral 1 denotes a first layer of ceramic plate, which is thicker than a normal copper plate and has a shield pattern 2α on its upper and peripheral surfaces.

2hを形成し、周端部近くに上下方向に貫通するスルー
ホール3αヲ形成し、このスルーホール3αの内周面に
後述のバブルメモリチップ6を封止するためのリング状
のキャップ4を挿入している。5は第二層目のセラミッ
ク板すなわち基板にして、上面にはその中央凹部5α内
にバブルメモリチップ6を固定し、このバブルメモリチ
ップ6の一端部にこれと接続する如く配線パターン7a
を形成し、その先端部にアース用パターン8を形成し、
上記配線パターン7αの端部に接続する如く該第二層目
のセラミック板5を上下方向に貫通する穴5b内に封入
された配線パターン7hを形成し、下面には一端部を上
記配線パターン7bに接続し、他端部な上記バブルメモ
リチップ6の端部下方位置に達する配線パターン7cを
形成している。また上記第二層目のセラミック板5はそ
の一端部上記スルーホール3αに接続する位置に上下方
向に貫通するスルーホール3bを形成し、その他端部上
記アース用パターン8に接続する位置に上下方向に貫通
するスルーホール9αを形成している。10は第三層目
のセラミック板にして、上記第一層目のセラミック板1
と略同−厚さで形成され、その下面および周面に夫々シ
ールドパターン11α、11hを形成し、上記スルーホ
ール3hおよび9αに接続する位置に夫夫上下方向に貫
通するスルーホール3cおよび9hを形成している。な
お、上記第二層目セラミック板5にはその配線パターン
7α、7bに接続する如く該第二層目セラミック板5の
周囲を囲むように駆動コイル(図示せず)を設け、かつ
ゲート開閉用導体パターン(図示せず)を設けている。
2h, a through hole 3α passing through in the vertical direction near the peripheral end is formed, and a ring-shaped cap 4 for sealing a bubble memory chip 6, which will be described later, is inserted into the inner peripheral surface of this through hole 3α. are doing. Reference numeral 5 designates a second layer ceramic plate, that is, a substrate, on the upper surface of which a bubble memory chip 6 is fixed in a central recess 5α, and a wiring pattern 7a is provided at one end of this bubble memory chip 6 so as to be connected thereto.
, and a grounding pattern 8 is formed at the tip thereof,
A wiring pattern 7h sealed in a hole 5b vertically penetrating the second layer ceramic plate 5 is formed so as to be connected to an end of the wiring pattern 7a, and one end of the wiring pattern 7b is connected to the bottom surface of the wiring pattern 7b. A wiring pattern 7c is formed which connects to the bubble memory chip 6 and reaches a position below the end of the bubble memory chip 6, which is the other end. Further, the second layer ceramic plate 5 has a through hole 3b penetrating in the vertical direction at one end thereof at a position connected to the through hole 3α, and a through hole 3b penetrating in the vertical direction at the other end at a position connected to the above earthing pattern 8. A through hole 9α passing through is formed. 10 is the third layer ceramic plate, and the above-mentioned first layer ceramic plate 1
shield patterns 11α and 11h are formed on the lower and circumferential surfaces, respectively, and through holes 3c and 9h that penetrate in the vertical direction are formed at positions connected to the through holes 3h and 9α. is forming. In addition, a drive coil (not shown) is provided on the second layer ceramic board 5 so as to surround the second layer ceramic board 5 so as to be connected to the wiring patterns 7α and 7b, and a drive coil (not shown) is provided for opening and closing the gate. A conductor pattern (not shown) is provided.

上記の構成であるから、上記バブルメモリチップ6から
の出力信号を入力したり、バブルメモリチップ6内の磁
気パズル(図示せず)の転送などに必要なゲート開閉用
導体パターンに電圧パルスを供給する作用を行なう配線
パターン7α、7b、7cを上記第二層目のセラミック
板5の上下両面に形成しているので、該第二層目のセラ
ミック板5の形状を小形化することができる。
With the above configuration, voltage pulses are supplied to the gate opening/closing conductor pattern necessary for inputting the output signal from the bubble memory chip 6 and transferring the magnetic puzzle (not shown) in the bubble memory chip 6. Since the wiring patterns 7α, 7b, and 7c that perform these functions are formed on both the upper and lower surfaces of the second layer ceramic plate 5, the shape of the second layer ceramic plate 5 can be made smaller.

また第一層目のセラミック板1に形成されたシールドパ
ターン2α、2iSと、第三層目のセラミック板10に
形成されたシールドパターン11α、11hとをスルー
ホール3α、5b、3cで接続し、かつ第三層目のセラ
ミック板に形成されたシールドパターン11α、11b
をスルーホール9α、9Aを介してアース用パターン8
に接続し、これKよって回転磁界用駆動コイルを発生す
る垂直成分に対する磁気遮蔽を行なう上記シールドパタ
ーン2α、2b。
Further, the shield patterns 2α, 2iS formed on the first layer ceramic plate 1 and the shield patterns 11α, 11h formed on the third layer ceramic plate 10 are connected by through holes 3α, 5b, 3c, and shield patterns 11α and 11b formed on the third layer ceramic plate.
Grounding pattern 8 via through holes 9α and 9A
The above-mentioned shield patterns 2α, 2b are connected to K and thereby perform magnetic shielding against the vertical component that generates the rotating magnetic field drive coil.

11α、11hをアース用パターンに兼用させているの
で、パッケージ全体を小形化しかつ磁気シールド効果に
より駆動コイルに発生する垂直磁界を小さくすることが
できる。したがってバブルメモリチップ60面に供給す
るバイアス磁界を磁石を使用してよ多正確に調整するこ
とができる。
Since 11α and 11h are also used as grounding patterns, it is possible to downsize the entire package and reduce the vertical magnetic field generated in the drive coil due to the magnetic shielding effect. Therefore, the bias magnetic field supplied to the surface of the bubble memory chip 60 can be adjusted more accurately using a magnet.

(発明の効果) 本発明は以上述べたる如く、パッケージ全体の形状を小
形化し、かつバブルメモリチップ面に供給するバイアス
磁界を正確に調整することができる。
(Effects of the Invention) As described above, the present invention can reduce the size of the entire package and accurately adjust the bias magnetic field supplied to the bubble memory chip surface.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例を示す磁気バブルメモリデバイ
スパッケージの斜視図、第2図は第1図のA−A’方向
断面正面図である。 1・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・第一層目のセラミック板2α
、2A、11α、11h・・・・・・シールドパターン
5B、5h、5c、9a、9b===スルーホール4・
・・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・キャップ5・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・・
・第二層目のセラミック板6・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・バ
ブルメモリチップ7α、7b、7c・・・・・・・・・
・・・・・・・・配線パターン8・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・・
・アース用パターン10 、=・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・第三層目のセ
ラミック板束 1図
FIG. 1 is a perspective view of a magnetic bubble memory device package showing an embodiment of the present invention, and FIG. 2 is a sectional front view taken along the line AA' in FIG. 1・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・First layer ceramic plate 2α
, 2A, 11α, 11h... Shield pattern 5B, 5h, 5c, 9a, 9b ===Through hole 4.
・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・Cap 5・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・
・Second layer ceramic plate 6・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・ Bubble memory chips 7α, 7b, 7c・・・・・・・・・
......Wiring pattern 8...
・・・・・・・・・・・・・・・・・・・・・・・・
・Earth pattern 10, =・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・Third layer ceramic plate bundle 1 diagram

Claims (1)

【特許請求の範囲】[Claims] 磁気バブルメモリチップを実装するためセラミックで形
成されたプリント基板と、このプリント基板の表、裏側
を介挿する複数個のセラミック板とを設け、上記プリン
ト基板にバブルメモリチップと、このバブルメモリチッ
プに接続して該プリント基板の表裏両面に連らなる如く
形成された配線パターンと、アース用パターンとを設け
、上記複数個のセラミック板およびプリント基板に、該
複数個のセラミック板の周面に形成されたシールドパタ
ーンを接続するスルーホールを設け、上記プリント基板
およびこのプリント基板の一方側のセラミック板に該一
方側のセラミック板の周面に形成された上記シールドパ
ターンと上記アース用パターンと接続するスルーホール
を設けたことを特徴とする磁気バブルメモリデバイスの
パッケージ。
In order to mount the magnetic bubble memory chip, a printed circuit board made of ceramic and a plurality of ceramic plates inserted on the front and back sides of the printed circuit board are provided, and the bubble memory chip and the bubble memory chip are mounted on the printed circuit board. A wiring pattern connected to and connected to the front and back surfaces of the printed circuit board and a grounding pattern are provided on the plurality of ceramic plates and the printed circuit board, and on the circumferential surface of the plurality of ceramic plates. A through hole is provided to connect the formed shield pattern, and the shield pattern and the grounding pattern formed on the circumferential surface of the ceramic plate on one side are connected to the printed circuit board and the ceramic plate on one side of the printed circuit board. A package for a magnetic bubble memory device characterized by having a through-hole.
JP60150272A 1985-07-10 1985-07-10 Package of magnetic bubble memory device Pending JPS6212986A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60150272A JPS6212986A (en) 1985-07-10 1985-07-10 Package of magnetic bubble memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60150272A JPS6212986A (en) 1985-07-10 1985-07-10 Package of magnetic bubble memory device

Publications (1)

Publication Number Publication Date
JPS6212986A true JPS6212986A (en) 1987-01-21

Family

ID=15493323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60150272A Pending JPS6212986A (en) 1985-07-10 1985-07-10 Package of magnetic bubble memory device

Country Status (1)

Country Link
JP (1) JPS6212986A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5935522A (en) * 1990-06-04 1999-08-10 University Of Utah Research Foundation On-line DNA analysis system with rapid thermal cycling
US6232079B1 (en) 1996-06-04 2001-05-15 University Of Utah Research Foundation PCR method for nucleic acid quantification utilizing second or third order rate constants
US7081226B1 (en) 1996-06-04 2006-07-25 University Of Utah Research Foundation System and method for fluorescence monitoring
US7273749B1 (en) 1990-06-04 2007-09-25 University Of Utah Research Foundation Container for carrying out and monitoring biological processes

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5935522A (en) * 1990-06-04 1999-08-10 University Of Utah Research Foundation On-line DNA analysis system with rapid thermal cycling
US7273749B1 (en) 1990-06-04 2007-09-25 University Of Utah Research Foundation Container for carrying out and monitoring biological processes
US7745205B2 (en) 1990-06-04 2010-06-29 University Of Utah Research Foundation Container for carrying out and monitoring biological processes
US6232079B1 (en) 1996-06-04 2001-05-15 University Of Utah Research Foundation PCR method for nucleic acid quantification utilizing second or third order rate constants
US6245514B1 (en) 1996-06-04 2001-06-12 University Of Utah Research Foundation Fluorescent donor-acceptor pair with low spectral overlap
US6569627B2 (en) 1996-06-04 2003-05-27 University Of Utah Research Foundation Monitoring hybridization during PCR using SYBR™ Green I
US7081226B1 (en) 1996-06-04 2006-07-25 University Of Utah Research Foundation System and method for fluorescence monitoring
US7670832B2 (en) 1996-06-04 2010-03-02 University Of Utah Research Foundation System for fluorescence monitoring

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