JPS62123339A - Soldering appearance inspection - Google Patents

Soldering appearance inspection

Info

Publication number
JPS62123339A
JPS62123339A JP26459885A JP26459885A JPS62123339A JP S62123339 A JPS62123339 A JP S62123339A JP 26459885 A JP26459885 A JP 26459885A JP 26459885 A JP26459885 A JP 26459885A JP S62123339 A JPS62123339 A JP S62123339A
Authority
JP
Japan
Prior art keywords
solder
soldering
inspection areas
inspection
binary coded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26459885A
Other languages
Japanese (ja)
Other versions
JPH067105B2 (en
Inventor
Kazunari Yoshimura
一成 吉村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP26459885A priority Critical patent/JPH067105B2/en
Publication of JPS62123339A publication Critical patent/JPS62123339A/en
Publication of JPH067105B2 publication Critical patent/JPH067105B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To enable inspection of a defective soldering at a high speed and a high accuracy, by automatically correcting inspection areas correspondingly to a deviation in an electronic component soldered on a printed wiring board. CONSTITUTION:First, as shown by (C), initializing inspection areas S0a-S0c are previously set about solder land parts 13a-13c to be inspected. Under such a condition, a chip part 11 mounted as shown by (A), is irradiated with a light in such a manner as to brighten solder surface. Then, the image thereof is taken by an ITV camera and binary coded to brighten the solder part to obtain binary coded images S1a-S1c as shown by (B). Then, the coincidence between the binary coded images S1a-S1c and the initializing inspection areas S0a-S0c are detected by an pixel computing section to make the coincidence part new correcting inspection areas S2a-S2c. To detect defective soldering subsequently, features of a defective soldering, namely, poor soldering or the like in the correcting inspection areas S2a-S2c are extracted and charged varying lighting, filters and the like. Thus, the fast and highly accurate processing of only solder parts is made possible.

Description

【発明の詳細な説明】 (技術分計) 本発明は電子部品等が実装された印刷配線基板(プリン
ト基板)のはんだ付け面におけるはんだ不足、はんだ無
し等のはんだ付け不良を検査するは/した付け外観検査
方法に関する。
[Detailed description of the invention] (Technical analysis) The present invention is a method for inspecting soldering defects such as insufficient solder or no solder on the soldering surface of a printed wiring board (printed circuit board) on which electronic components are mounted. This invention relates to a mounting appearance inspection method.

(背景技術) 例又はチ、ツブ部品の如き電子部品が実装された印刷配
線基板の実装はんだ付け状態を自動的に検査する場合、
従来においては第3図(イ)に示すようにチップ部品1
1のはんだ付けランド部13a〜13cの中に検査領域
S、〜S0を設定し、照明やフィルタ等を切り替え、I
TVカメラ等により撮像して画像処理を行い、上記検査
領域S。
(Background Art) For example, when automatically inspecting the mounting soldering state of a printed wiring board on which electronic components such as tab components are mounted,
Conventionally, as shown in Figure 3 (a), a chip component 1
Inspection areas S, ~S0 are set in the soldering lands 13a to 13c of No. 1, and the lighting, filters, etc. are switched, and the I
The inspection area S is imaged with a TV camera or the like and subjected to image processing.

〜Sc内にはんだ付け不良があるかどうかを判定する方
法がある。なお、同図(ロ)は(イ)における矢印方向
から見た側面図であり、10は印刷配線基板、12a〜
12eはリード端子である。
There is a method of determining whether there is a soldering defect within ~Sc. In addition, the same figure (b) is a side view seen from the arrow direction in (a), 10 is a printed wiring board, 12a-
12e is a lead terminal.

上記の検査方法の1つとして、第4図に示すように検査
領域Sの面1liIA内ではんだ付け不良部面′MiB
を画像処理により検出し、□〉不良規格・・・・・・・
・・・・・(1)の場合、不良と判定する方式がある。
As one of the above inspection methods, as shown in FIG.
is detected by image processing, and □〉Defective standard...
...In the case of (1), there is a method of determining it as defective.

しかしながら、上述の方法にあっては予め設定された検
査領域は固定であるため、第5図に示すようにチップ部
品11が位置ずれを起こした場合、検査領域内にチップ
部品11の像が入り込み、検査領域の面積ははんだ付け
部のみの面積ではなくなり、式(1)の判定方法では検
査精度が−Fがらないという欠点があった。このことば
式(1)に限らず他の検査方法でも同様である。
However, in the above method, the preset inspection area is fixed, so if the chip component 11 is misaligned as shown in FIG. 5, the image of the chip component 11 will enter the inspection area. , the area of the inspection area is no longer the area of only the soldered part, and the determination method of equation (1) has the drawback that -F does not improve the inspection accuracy. The same applies not only to this expression (1) but also to other inspection methods.

上述の欠点を解決するものとしては、2極端子付チツプ
の例のようにチップずれ量を他の方法で測定し、そのず
れ量分だけ検査領域を修正する方法がある。しかしなが
ら、この方法はチップの傾き、形状等、変動要因が多い
ために測定し修正するのに時間がかかるという欠点があ
り、また3極チツプの検査などでは精度が悪くなるとい
う欠点があった。
As a solution to the above-mentioned drawbacks, there is a method of measuring the amount of chip deviation using another method, as in the case of a chip with a two-pole terminal, and correcting the inspection area by the amount of deviation. However, this method has the disadvantage that it takes time to measure and correct because there are many variables such as the tilt and shape of the chip, and the accuracy is poor when inspecting a three-pole chip.

(発明の目的) 本発明は上述の問題点を解決し、はんだ付け不良?高精
度で、かつ自動的に高速に検査することができるはんt
イ付け外観検査方法を提供することを目的としている。
(Objective of the Invention) The present invention solves the above-mentioned problems and solves the problem of soldering failure. Handles that can be inspected with high precision and automatically at high speed
The purpose of this paper is to provide a method for visually inspecting the appearance of the parts.

(発明の開示) 以下、実施例を示す図面に沿って本発明を詳述する。な
お、以下についてはチップ部品を例にとって説明するが
、その他の電子部品であっても差し支えないことは言う
までもない。
(Disclosure of the Invention) The present invention will be described in detail below with reference to the drawings showing embodiments. Note that although the following description will be made using a chip component as an example, it goes without saying that other electronic components may be used.

第1図は本発明の一実施例を示すブロック図であり、本
発明の検査方法を具体化しt:ものである。しかして、
ITVカメラ1により印刷配線基板−Fのはんだ付け部
を撮像し、その撮像43号を2値化処理部2において好
適な2値化レベルで2値化する。そして、その2値化像
と、画像信号に同期して出力される初期設定検査領域メ
モリ部5のデータとを画素演算部4で画素演算し、両者
が一致する領域を修正検査領域メモリ部6に記憶する。
FIG. 1 is a block diagram showing an embodiment of the present invention, which embodies the inspection method of the present invention. However,
The ITV camera 1 captures an image of the soldered portion of the printed wiring board-F, and the captured image 43 is binarized at a suitable binarization level in the binarization processing unit 2. Then, the pixel calculation unit 4 performs pixel calculation on the binarized image and the data in the initial setting inspection area memory unit 5 that is output in synchronization with the image signal, and the area where the two match is selected by the modified inspection area memory unit 6. to be memorized.

次に検査時の撮像信号とその信号に同期した修正検査領
域メモリ部6の出力を用い、画像処理部3で画像処理を
行い、判定処理部7にて判定処理を行うものである。
Next, the image processing section 3 performs image processing, and the determination processing section 7 performs determination processing, using the imaging signal at the time of inspection and the output of the modified inspection area memory section 6 synchronized with the signal.

以下、第2図を参照してより具体的に処理の手順を説明
する。
The processing procedure will be explained in more detail below with reference to FIG.

しかして、第4図(ハ)に示すように予め検査するはん
だ付けランド部13a−13cのまわりに初期設定検査
領域S0.〜Socを設定しておく。この状態で(イ)
のように実装されたチップ部品11に対し、はんだ面が
明るくなるような照明、例えば拡散光を照射し、その像
をITVカメラ1で撮像する。撮像した像ははんだ付け
部のみが明るくなるように2値化され、(ロ)の如く2
値化像S1.〜S leが得られる。そして、この2値
化像S la〜S1゜と初期設定検査領域S。、〜So
cの一致部を画素演算部4で検出し、新たに修正検査領
域S2.〜S2cとする。次に、はんだ付け不良を検出
できるように照明、フィルタ等を変 。
As shown in FIG. 4(c), an initial setting inspection area S0. ~ Set Soc. In this state (a)
Illumination that brightens the solder surface, for example, diffused light, is applied to the chip component 11 mounted as shown in FIG. The captured image is binarized so that only the soldered part becomes brighter, and the image is binarized as shown in (b).
Valued image S1. ~S le is obtained. Then, the binarized images Sla to S1° and the initial setting inspection area S. ,~So
The pixel calculation unit 4 detects the matching portion of S2. ~S2c. Next, we changed lighting, filters, etc. to detect soldering defects.

えて、修正検査領域S2.〜S2c内のはんだ付け不良
、すなわち、はんだ不足、はんだ無し等の特徴を抽出し
、判定を行う。しかして、この方法によれば、はんだ付
け部のみの情報を梼度よく高速に処理することができる
Then, the correction inspection area S2. Characteristics of soldering defects in ~S2c, ie, insufficient solder, no solder, etc., are extracted and determined. Therefore, according to this method, information on only the soldered portion can be processed efficiently and at high speed.

(発明の効果) 以上のように本発明にあっては、実装はんだ付けされた
印刷配線基板のはんだ付け部の検査を、m子部品のずれ
に対応して検査領域を自動 シ修正できるようにしたの
で、 (イ)電子部品のずれが発生しても高精度ではんだ不足
、はんだ無し等のはんだ付け不良が検出可能である。
(Effects of the Invention) As described above, according to the present invention, the inspection area can be automatically corrected in response to the misalignment of m-child components when inspecting the soldered portion of a printed wiring board that has been soldered. (a) Even if electronic components become misaligned, it is possible to detect soldering defects such as insufficient solder or no solder with high accuracy.

(ロ)複雑な計算が不要であり高速処理が可能である。(b) Complex calculations are not required and high-speed processing is possible.

(ハ)複雑な形状の検査領域でも高精度に修正されるた
め、初期設定は大まかな形状でよく、作業性が向上する
(c) Even complex-shaped inspection areas can be corrected with high precision, so initial settings can be made with a rough shape, improving work efficiency.

等の効果がある。There are other effects.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明を具体化した一実施例を示すブロック図
、第2図はその説明図、第3図ないし第5図は従来の外
観検査方法の説明図である。 1・・・・ITVカメラ、2・・・・2値化処理部、3
・・・・・画像処理部、4・・・・・画素演算部、5・
初期設定検査領域メモリ部、6・・・・修正検査領域メ
モリ部、7・・・・判定処理部 寺許出願人 松下電工株式会社
FIG. 1 is a block diagram showing an embodiment embodying the present invention, FIG. 2 is an explanatory diagram thereof, and FIGS. 3 to 5 are explanatory diagrams of a conventional appearance inspection method. 1... ITV camera, 2... Binarization processing section, 3
... Image processing section, 4 ... Pixel calculation section, 5.
Initial setting inspection area memory section, 6... Modified inspection area memory section, 7... Judgment processing section Applicant: Matsushita Electric Works Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims]  実装はんだ付けされた印刷配線基板のはんだ付け外観
検査において、はんだ付け部が明るくなるような照明を
照射し、その像をITVカメラで撮像し、はんだ面が白
く出る閾値で2値化した像と予め設定した検査領域との
一致部を新たな検査領域とし、その検査領域内ではんだ
不足、はんだ無し等の各外観検査を行うことを特徴とす
るはんだ付け外観検査方法。
In the soldering appearance inspection of printed wiring boards that have been soldered, we irradiate the soldering area with a light that brightens the area, capture the image with an ITV camera, and convert it into a binarized image using a threshold value that makes the solder surface appear white. A soldering appearance inspection method characterized in that a part that coincides with a preset inspection area is set as a new inspection area, and various appearance inspections such as insufficient solder and no solder are performed within the inspection area.
JP26459885A 1985-11-22 1985-11-22 Soldering appearance inspection method Expired - Lifetime JPH067105B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26459885A JPH067105B2 (en) 1985-11-22 1985-11-22 Soldering appearance inspection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26459885A JPH067105B2 (en) 1985-11-22 1985-11-22 Soldering appearance inspection method

Publications (2)

Publication Number Publication Date
JPS62123339A true JPS62123339A (en) 1987-06-04
JPH067105B2 JPH067105B2 (en) 1994-01-26

Family

ID=17405532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26459885A Expired - Lifetime JPH067105B2 (en) 1985-11-22 1985-11-22 Soldering appearance inspection method

Country Status (1)

Country Link
JP (1) JPH067105B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04115146A (en) * 1990-09-06 1992-04-16 Matsushita Electric Ind Co Ltd Inspecting device for soldering and soldering inspection correction apparatus provided with same
CN112867906A (en) * 2018-10-23 2021-05-28 株式会社富士 Component data, component data generating method, and component mounting machine

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04115146A (en) * 1990-09-06 1992-04-16 Matsushita Electric Ind Co Ltd Inspecting device for soldering and soldering inspection correction apparatus provided with same
CN112867906A (en) * 2018-10-23 2021-05-28 株式会社富士 Component data, component data generating method, and component mounting machine

Also Published As

Publication number Publication date
JPH067105B2 (en) 1994-01-26

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