JPS62119964A - Composite circuit device - Google Patents

Composite circuit device

Info

Publication number
JPS62119964A
JPS62119964A JP25996085A JP25996085A JPS62119964A JP S62119964 A JPS62119964 A JP S62119964A JP 25996085 A JP25996085 A JP 25996085A JP 25996085 A JP25996085 A JP 25996085A JP S62119964 A JPS62119964 A JP S62119964A
Authority
JP
Japan
Prior art keywords
substrate
pattern
conductor
circuit device
electrode conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25996085A
Other languages
Japanese (ja)
Inventor
Takeshi Suzuki
健 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP25996085A priority Critical patent/JPS62119964A/en
Publication of JPS62119964A publication Critical patent/JPS62119964A/en
Pending legal-status Critical Current

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  • Parts Printed On Printed Circuit Boards (AREA)

Abstract

PURPOSE:To enable forming out only such as a transistor but also a condenser on a substrate and to minimize the size and the weight of a construction by using a ceramic sintered body for the substrate when an electrode conductor, a conductor pattern, a transistor, a resistance, etc. are provided on the insulating substrate. CONSTITUTION:A ceramic sintered body which is a dielectric is used for an insulating substrate 1 which constitutes a composite circuit device and an upper electrode conductor 2a and a lower electrode conductor 2b facing to the front the back surfaces of a half of the substrate formed to make a condenser. Then, on the other half of the surface of the substrate, a conductor pattern P, a resistance R connected to the pattern P, a transistor T positioned on the pattern P, etc. are provided for the parts of a circuit. Then, a through-hole 3 is made on the substrate 1, the end of the lower electrode conductor 2b is connected to the pattern P on the upper surface via the hole 3 and the end of the upper electrode conductor 2a is directly connected to the pattern P. In this way, the number of connection points is reduced and the composite circuit device is simplified.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はセラミックコンデンサ焼結基板の一部の両面に
導体膜を設けてコンデンサを形成すると同時に、前記基
板の他の部分に導体パターンを設け、回路部品を搭載し
た複合回路装置に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a method of forming a capacitor by providing a conductor film on both sides of a part of a sintered ceramic capacitor substrate, and at the same time providing a conductor pattern on another part of the substrate. , relates to a composite circuit device equipped with circuit components.

〔従来の技術〕[Conventional technology]

従来は、セラミックコンデンサを含んだ回路を構成する
場合は、単体のコンテンプと回路を構成する抵抗、半導
体部品等をマザーボード上に搭載していた。
Conventionally, when configuring a circuit including a ceramic capacitor, a single capacitor, resistors, semiconductor components, etc. that make up the circuit were mounted on a motherboard.

〔発明が解決しようとする聞達点〕[The problem that the invention aims to solve]

この方法では、マザーボードとセラミックコンデンサが
別々に製造されるため大型で重I−も重く、また高価と
なる欠点があった。
In this method, the motherboard and the ceramic capacitor are manufactured separately, so they are large, heavy, and expensive.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、この点に鑑み、コンデンサの誘電体層として
のセラミックコンデンサ焼結基板と、回路部品を搭載す
るマザーボードを兼用させて、小型軽量しかも安価な複
合回路装置を提供するものである。
In view of this point, the present invention provides a compact, lightweight, and inexpensive composite circuit device that uses a ceramic capacitor sintered substrate as a dielectric layer of a capacitor and a motherboard on which circuit components are mounted.

〔実施例〕〔Example〕

つぎに本発明を実施例により説明する。 Next, the present invention will be explained by examples.

第1図(a)は本発明の一実施例の樹脂封止前の平面図
、同図(b)は同図(a)のA−Alr面図である。第
1図(a) 、 (b)において、lはセラミックコン
デンサのセラミックス製造プロセスによって作られた、
セラミック焼結体のコンチン丈基板で、この基板のほぼ
左半分の上面と下面には、この基板を誘電体層としてコ
ンデンサを形成する電極導体2aと2bがそれぞれ形成
されている。また、基板lのほぼ右半分は一般的な回路
基板に兼用し、その上面には導体パターンPおよびこの
導体パターンに接続された抵抗Rが形成されており、ま
た、導体パターンPの所望の部分には、トランジスタT
が搭載されている。また、上面のコンデンサ電極導体2
aはそのまま回路基板部に引出され、また、下面電極導
体2bはスルーホール3を介して上面に引き出され、回
路部の導体パターンPと接続されている。
FIG. 1(a) is a plan view of an embodiment of the present invention before resin sealing, and FIG. 1(b) is an A-Alr plane view of FIG. 1(a). In Figures 1(a) and (b), l is made by the ceramic manufacturing process of a ceramic capacitor,
This is a continuum length substrate made of a ceramic sintered body, and electrode conductors 2a and 2b forming a capacitor using the substrate as a dielectric layer are formed on the upper and lower surfaces of approximately the left half of this substrate, respectively. In addition, approximately the right half of the board l is also used as a general circuit board, and a conductor pattern P and a resistor R connected to this conductor pattern are formed on the upper surface, and a desired portion of the conductor pattern P is has a transistor T
is installed. In addition, the capacitor electrode conductor 2 on the top surface
The electrode conductor 2b is drawn out to the upper surface through the through hole 3 and connected to the conductor pattern P of the circuit section.

このような本発明の複合回路装置では、基板lを誘電体
層とするコンデンサの電極導体および回路部の導体パタ
ーンは同一材料を用いて構成することができる。また、
外部接続用のリード端子は通常の集積回路用のを用いる
ことができ、最後の樹脂封止工程は一般のセラミックコ
ンデンサの工程と同じ工程で封止できる。
In such a composite circuit device of the present invention, the electrode conductor of the capacitor and the conductor pattern of the circuit portion, in which the substrate 1 is a dielectric layer, can be constructed using the same material. Also,
Lead terminals for external connection can be those for ordinary integrated circuits, and the final resin sealing process can be performed in the same process as that for general ceramic capacitors.

〔発明の効果〕〔Effect of the invention〕

この様な本発明の構成により1次の様な効果がでてくる
This configuration of the present invention produces a first-order effect.

(1)  構造が簡単で小型軸量となる。(1) Simple structure and small shaft size.

(2)  安価になる。(2) It will be cheaper.

(3)接続点数の減少による信頼性が向上する。(3) Reliability is improved by reducing the number of connection points.

(4)部品点数の減少により管理が簡単になる。(4) Management becomes easier due to a reduction in the number of parts.

以上述べた如く1本発明によれば小型@量でしかも安価
な複合回路装置を提供することができる。
As described above, according to the present invention, it is possible to provide a compact and inexpensive composite circuit device.

【図面の簡単な説明】[Brief explanation of drawings]

□ 第1ab本発明の一実施例の樹脂封止前の平面図、
同図(b)は同図(a)のA−A断面図である。 1・・・・・−セラミックコンデンサ基板、 2a °
゛°°°°上面電極導体、2b・・・・・・下面電極導
体、3・・・・・・スルーホール。
□ 1stab Plan view of one embodiment of the present invention before resin sealing,
The figure (b) is a sectional view taken along the line AA in the figure (a). 1...-Ceramic capacitor board, 2a °
゛°°°°Top electrode conductor, 2b...Bottom electrode conductor, 3...Through hole.

Claims (1)

【特許請求の範囲】[Claims]  セラミックコンデンサ焼結基板の一部の両面に導体膜
を設けてなるコンデンサ部と、前記基板の他の部分に設
けられた導体パターンおよびこの導体パターンに取付け
られた回路部品とを含むことを特徴とする複合回路装置
The capacitor is characterized by including a capacitor section formed by providing a conductor film on both sides of a part of a sintered ceramic capacitor board, a conductor pattern provided on another part of the board, and a circuit component attached to the conductor pattern. Composite circuit device.
JP25996085A 1985-11-19 1985-11-19 Composite circuit device Pending JPS62119964A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25996085A JPS62119964A (en) 1985-11-19 1985-11-19 Composite circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25996085A JPS62119964A (en) 1985-11-19 1985-11-19 Composite circuit device

Publications (1)

Publication Number Publication Date
JPS62119964A true JPS62119964A (en) 1987-06-01

Family

ID=17341312

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25996085A Pending JPS62119964A (en) 1985-11-19 1985-11-19 Composite circuit device

Country Status (1)

Country Link
JP (1) JPS62119964A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01160574A (en) * 1987-11-04 1989-06-23 Avon Ind Polymers Ltd Handle grip
US5600175A (en) * 1994-07-27 1997-02-04 Texas Instruments Incorporated Apparatus and method for flat circuit assembly

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01160574A (en) * 1987-11-04 1989-06-23 Avon Ind Polymers Ltd Handle grip
US5600175A (en) * 1994-07-27 1997-02-04 Texas Instruments Incorporated Apparatus and method for flat circuit assembly

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