JPS62119950A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPS62119950A
JPS62119950A JP25996985A JP25996985A JPS62119950A JP S62119950 A JPS62119950 A JP S62119950A JP 25996985 A JP25996985 A JP 25996985A JP 25996985 A JP25996985 A JP 25996985A JP S62119950 A JPS62119950 A JP S62119950A
Authority
JP
Japan
Prior art keywords
island
leads
tie bars
resin
outer frames
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25996985A
Other languages
Japanese (ja)
Inventor
Seiichi Nishino
西野 誠一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP25996985A priority Critical patent/JPS62119950A/en
Publication of JPS62119950A publication Critical patent/JPS62119950A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent short-circuiting between leads by a method wherein necking-provided half holes or protrusions are formed on the sides, nearer to as island, of tie bars and outer frames. CONSTITUTION:Necking-provided protrusions 6 are formed on the sides, nearer to an island 2, of tie bars 3 between leads 4, and necking-provided half holes 5 are formed on the inner sides of outer frames 1a, 1b. In this design, any plating transferred to a sealing-resin surface during its contact with the sides of the tie bars 3 and outer frames 1a, 1b does not cause short-circuiting. No short-circuiting occurs because part of plating-contaminated resin is removed by neck portions of half holes 5 and protrusions during a process of removing the tie bars 3 and outer frames 1a, 1b and any plating retained in a resin section 10 has both ends of a plated layer 11 removed between leads 4.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹封止型半導体装置のリード付けおよび樹脂封
止組立に用いられる半導体装置用リードフレームに関す
る。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a lead frame for a semiconductor device used for lead attachment and resin-sealing assembly of a tree-encapsulated semiconductor device.

〔従来の技術〕[Conventional technology]

K2図は従来のリードフレームに、半導体素子を固着し
、樹脂封止した状態の一単位区分を示す平面図である。
Figure K2 is a plan view showing one unit section of a conventional lead frame in which a semiconductor element is fixed and sealed with resin.

図において、上下の外枠7a、7bにより、テープ状に
細長く多数の単位区分が連結されたリードフレームの各
単位区分には、吊りリードによって外枠7a、7bに支
持されたアイランド2に半導体素子8が固着されており
、タイバー13により互いに連結された多数のリード4
の内端部がアイランド2の周囲に集るように配置されて
いる。そして、リード4の内端部と半導体素子8の電極
パッドとの間をボンディングワイヤ9で結線後、樹脂(
点線で示す)10により封止されている。
In the figure, each unit section of a lead frame, in which a large number of elongated unit sections are connected in a tape-like manner by upper and lower outer frames 7a and 7b, has a semiconductor element mounted on an island 2 supported by hanging leads on outer frames 7a and 7b. 8 are fixed to each other, and a large number of leads 4 are connected to each other by tie bars 13.
are arranged so that their inner ends are gathered around the island 2. After connecting the inner end of the lead 4 and the electrode pad of the semiconductor element 8 with the bonding wire 9, the resin (
10 (shown with a dotted line).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記のようなリードフレームにおいて、アイランド2に
素子8を固着するためおよびリード内端部と半導体素子
の電極パッドとの間をポンディングワイヤで接続するた
めに、各リード4の内端部およびアイランド2にAuめ
っきまたはAgめっきが部分的に施されている。しかし
、部分めっきの際に、タイバー13や外枠7a、7bの
側面にもかなりのめっき層が付いてしまう。この側面部
に付着しためっき層は、めっき液のにじみ出し等によシ
付着したものであるため、下地との密着が悪く剥れ易い
。したがって、樹脂10で封止した際に、リードフレー
ムの板厚の隙間から樹脂封止範囲外に浸出した封止樹脂
の方に、前記タイバー側面および外枠側面のめっき層が
転写した形で付着してしまい、タイバーおよび外枠を切
断除去後においてリード間を短絡状態にすることが暫々
発生するという欠点があった。
In the lead frame as described above, the inner end of each lead 4 and the island are used to fix the element 8 to the island 2 and to connect the inner end of the lead and the electrode pad of the semiconductor element with a bonding wire. 2 is partially plated with Au or Ag. However, during partial plating, a considerable plating layer is also deposited on the tie bars 13 and the side surfaces of the outer frames 7a and 7b. The plating layer adhering to this side surface is deposited due to oozing of the plating solution, etc., and therefore does not adhere well to the base and easily peels off. Therefore, when sealing with resin 10, the plating layer on the tie bar side surface and the outer frame side surface is transferred and attached to the sealing resin that leaks out of the resin sealing range from the gap in the lead frame plate thickness. This has the drawback that after the tie bars and outer frame are cut and removed, the leads may be short-circuited for some time.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点に対し、本発明では、タイバーおよび外枠の
アイランドに面する側面部のめっき層が、このタイバー
および外枠を切り離し後に、リード間を短絡するような
形で封止樹脂の方に残らないように、前記タイバーおよ
び外枠の側面にくびれ部を有する半穴部または突起部を
設けている。
In order to solve the above problem, in the present invention, after the tie bars and outer frame are separated, the plating layer on the side surface facing the island is applied to the sealing resin in a manner that short-circuits between the leads. In order to prevent this from remaining, semi-holes or protrusions with constrictions are provided on the side surfaces of the tie bar and outer frame.

〔実施例〕〔Example〕

つぎに本発明を実施例によシ説明する。 Next, the present invention will be explained using examples.

第1図は本発明の一実施例の一単位区分を示す平面図で
ある。図において、半導体素子を固着するアイランド2
は吊夛リードによシ外枠1a、lbに支持されている。
FIG. 1 is a plan view showing one unit section of an embodiment of the present invention. In the figure, an island 2 to which a semiconductor element is fixed
are supported by the outer frames 1a and lb by hanging leads.

アイランド2の周囲には、タイバー3により互いに連結
され、そして外枠1a。
The island 2 is surrounded by an outer frame 1a connected to each other by tie bars 3.

1bに支持された多数のり−ド4の内端部が配置されて
いる。しかして、各リード間のタイバー3のアイランド
に面する側面には、くびれ部を有するくさび状の突起部
6が設けられ、また、外枠1a。
The inner ends of a number of boards 4 supported by 1b are arranged. A wedge-shaped protrusion 6 having a constricted portion is provided on the side surface facing the island of the tie bar 3 between each lead, and the outer frame 1a.

1bの内側の側面には、くびれ部を有する半穴部5が設
けられている。
A half-hole portion 5 having a constricted portion is provided on the inner side surface of 1b.

〔発明の効果〕〔Effect of the invention〕

上述のとおり、本発明では、アイランドに面するタイバ
ーおよび外枠の側面に、くびれ部を有する半穴部または
突起部を設けているので、この側面に接触する封止樹脂
の面に、前記側面のめっき層が転写付着するとしても、
この接触樹脂の一部分はタイバーおよび外枠切断除去の
際に、半穴部または突起部のくびれ部のために持ち去ら
れるので、第3図の斜視図に示すように樹脂部1oの方
に残るめっき層11は、リード間の両端部が欠除されて
おシ、リード間を短絡することは全く表<なっている。
As described above, in the present invention, a semi-hole or protrusion having a constriction is provided on the side surface of the tie bar and outer frame facing the island, so that the side surface is formed on the surface of the sealing resin that contacts this side surface. Even if the plating layer is transferred and adhered,
A portion of this contact resin is removed when the tie bar and outer frame are cut and removed due to the half hole or constriction of the protrusion, so that the plating remaining on the resin portion 1o as shown in the perspective view of Fig. 3 is removed. Layer 11 is omitted at both ends between the leads, and there is no possibility of shorting between the leads.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の平面図、第2図は従来のリ
ードフレームに半導体素子を固着し樹脂封止した状態の
平面図、第3図は本発明の詳細な説明するための部分斜
視図である。 la、lb、7a、7b・・・・・・外枠、2・・・・
・・アイランド、3.13・・・・・・タイバー、4・
・団・IJ−)”、5・・団・くびれ部をもつ半円の穴
、6・・・・・・くびれ部をもつ突起、訃・・・・・半
導体素子、9・・・・・・ポンディングワイヤ、10・
・・・・・封止樹脂、11・・・・・・めっき層。 茅 i  yJ    茅 2 凋 l/3 茅 3 凹
FIG. 1 is a plan view of an embodiment of the present invention, FIG. 2 is a plan view of a conventional lead frame in which a semiconductor element is fixed and sealed with resin, and FIG. 3 is a plan view for explaining the present invention in detail. FIG. la, lb, 7a, 7b...Outer frame, 2...
...Island, 3.13...Tie bar, 4.
・Gun・IJ-)”, 5.・Semicircular hole with a constriction, 6...Protrusion with a constriction, end...Semiconductor element, 9...・Ponding wire, 10・
... Sealing resin, 11... Plating layer. grass i yJ grass 2 凋l/3 grass 3 concave

Claims (1)

【特許請求の範囲】[Claims] 半導体素子を固着するアイランドと、このアイランドの
周囲に内端部が集るように配置された多数のリードと、
この多数のリードを互いに連結しているタイバーと、前
記アイランドおよび多数のリードを含む単位区分の多数
を連結する外枠とを具えた半導体装置用リードフレーム
において、前記タイバーおよび外枠の前記アイランドに
面する側面部に、くびれ部を有する半穴部または突起部
を有することを特徴とする半導体装置用リードフレーム
An island to which a semiconductor element is fixed, a large number of leads arranged so that their inner ends are gathered around this island,
In the lead frame for a semiconductor device, which includes tie bars that connect a large number of leads to each other, and an outer frame that connects a large number of unit sections including the island and a large number of leads, the tie bar and the island of the outer frame are connected to each other. A lead frame for a semiconductor device, characterized in that it has a semi-hole portion or a protrusion portion having a constriction portion on a facing side surface portion.
JP25996985A 1985-11-19 1985-11-19 Lead frame for semiconductor device Pending JPS62119950A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25996985A JPS62119950A (en) 1985-11-19 1985-11-19 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25996985A JPS62119950A (en) 1985-11-19 1985-11-19 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPS62119950A true JPS62119950A (en) 1987-06-01

Family

ID=17341439

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25996985A Pending JPS62119950A (en) 1985-11-19 1985-11-19 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPS62119950A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011091326A (en) * 2009-10-26 2011-05-06 Mitsui High Tec Inc Lead frame, and intermediate product of semiconductor device
JP2015029143A (en) * 2008-08-29 2015-02-12 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー Resin encapsulated semiconductor device and method of manufacturing the same, and lead frame
US9905497B2 (en) 2008-08-29 2018-02-27 Semiconductor Components Industries, Llc Resin sealing type semiconductor device and method of manufacturing the same, and lead frame

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50128466A (en) * 1974-03-27 1975-10-09

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50128466A (en) * 1974-03-27 1975-10-09

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015029143A (en) * 2008-08-29 2015-02-12 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー Resin encapsulated semiconductor device and method of manufacturing the same, and lead frame
US9905497B2 (en) 2008-08-29 2018-02-27 Semiconductor Components Industries, Llc Resin sealing type semiconductor device and method of manufacturing the same, and lead frame
JP2011091326A (en) * 2009-10-26 2011-05-06 Mitsui High Tec Inc Lead frame, and intermediate product of semiconductor device

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