JPS6211752B2 - - Google Patents

Info

Publication number
JPS6211752B2
JPS6211752B2 JP15800280A JP15800280A JPS6211752B2 JP S6211752 B2 JPS6211752 B2 JP S6211752B2 JP 15800280 A JP15800280 A JP 15800280A JP 15800280 A JP15800280 A JP 15800280A JP S6211752 B2 JPS6211752 B2 JP S6211752B2
Authority
JP
Japan
Prior art keywords
address
storage
access
module
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15800280A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5781659A (en
Inventor
Shukichi Moryama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP15800280A priority Critical patent/JPS5781659A/ja
Publication of JPS5781659A publication Critical patent/JPS5781659A/ja
Publication of JPS6211752B2 publication Critical patent/JPS6211752B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP15800280A 1980-11-10 1980-11-10 Storage controller Granted JPS5781659A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15800280A JPS5781659A (en) 1980-11-10 1980-11-10 Storage controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15800280A JPS5781659A (en) 1980-11-10 1980-11-10 Storage controller

Publications (2)

Publication Number Publication Date
JPS5781659A JPS5781659A (en) 1982-05-21
JPS6211752B2 true JPS6211752B2 (enrdf_load_html_response) 1987-03-14

Family

ID=15662097

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15800280A Granted JPS5781659A (en) 1980-11-10 1980-11-10 Storage controller

Country Status (1)

Country Link
JP (1) JPS5781659A (enrdf_load_html_response)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0231862U (enrdf_load_html_response) * 1988-08-19 1990-02-28

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4992114B2 (ja) * 2008-02-19 2012-08-08 エヌイーシーコンピュータテクノ株式会社 主記憶装置及び主記憶装置のアドレス制御方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0231862U (enrdf_load_html_response) * 1988-08-19 1990-02-28

Also Published As

Publication number Publication date
JPS5781659A (en) 1982-05-21

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