JPS62114458U - - Google Patents

Info

Publication number
JPS62114458U
JPS62114458U JP154086U JP154086U JPS62114458U JP S62114458 U JPS62114458 U JP S62114458U JP 154086 U JP154086 U JP 154086U JP 154086 U JP154086 U JP 154086U JP S62114458 U JPS62114458 U JP S62114458U
Authority
JP
Japan
Prior art keywords
semiconductor element
view
junction
terminals
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP154086U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP154086U priority Critical patent/JPS62114458U/ja
Publication of JPS62114458U publication Critical patent/JPS62114458U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の半導体素子の一実施例の正面
図、第2図は第1図の側面図、第3図は第1図の
底面図、第4図は第1図の半導体素子と接合形が
異なつた半導体素子の正面図、第5図は第4図の
側面図、第6図は第4図の底面図、第7図は従来
の半導体素子の一例の正面図、第8図は第7図の
側面図、第9図は第7図の底面図である。 図中、1,6:トランジスタ本体、3,8:エ
ミツタ端子、4,9:コレクタ端子、5,10:
ベース端子。
FIG. 1 is a front view of one embodiment of the semiconductor device of the present invention, FIG. 2 is a side view of FIG. 1, FIG. 3 is a bottom view of FIG. 1, and FIG. 4 is a view of the semiconductor device of FIG. 5 is a side view of FIG. 4, FIG. 6 is a bottom view of FIG. 4, FIG. 7 is a front view of an example of a conventional semiconductor device, and FIG. 8 is a front view of a semiconductor element with different bonding types. is a side view of FIG. 7, and FIG. 9 is a bottom view of FIG. In the figure, 1, 6: transistor body, 3, 8: emitter terminal, 4, 9: collector terminal, 5, 10:
base terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 極性の異なつた複数の端子を有する半導体素子
に於いて、該半導体素子の形状を接合形等の種類
により異なつた形状に形成したことを特徴とする
半導体素子。
1. A semiconductor element having a plurality of terminals with different polarities, the semiconductor element having different shapes depending on the type of junction, etc.
JP154086U 1986-01-08 1986-01-08 Pending JPS62114458U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP154086U JPS62114458U (en) 1986-01-08 1986-01-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP154086U JPS62114458U (en) 1986-01-08 1986-01-08

Publications (1)

Publication Number Publication Date
JPS62114458U true JPS62114458U (en) 1987-07-21

Family

ID=30779541

Family Applications (1)

Application Number Title Priority Date Filing Date
JP154086U Pending JPS62114458U (en) 1986-01-08 1986-01-08

Country Status (1)

Country Link
JP (1) JPS62114458U (en)

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