JPS62111403A - Formation of resistance element of hybrid intergrated circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] A printed resistor of a hybrid integrated circuit that is formed in a multilayer structure in which a continuous resistor is interposed with an insulator, so that the distance between the conductors forming the resistor can be narrowed and high-density packaging can be achieved. How to form the body.

[Industrial application field]

The present invention relates to a method for forming a resistor in a hybrid integrated circuit, and more particularly to a method for forming a resistor in a multi-layered hybrid integrated circuit in which an insulator is interposed between a continuous resistor between conductors.

In recent years, there has been a strong demand for miniaturization of electronic devices in general, and it goes without saying that the electronic components used are also trending toward miniaturization. There is a strong demand for the development of a method for forming resistors in hybrid integrated circuits in which resistors printed on these electronic components, such as resistors printed between conductors on a substrate, can be made smaller with the same resistance value.

[Conventional technology]

FIG. 3 is a side sectional view of a conventional method for forming a resistor in a hybrid integrated circuit.

In the figure, one layer of resistor 3 is formed between conductors 2 formed on a substrate 1 by printing or the like.

[Problem that the invention seeks to solve]

In the above conventional method for forming a resistor in a hybrid 4J multilayer circuit, the resistor is formed in only one layer between the conductors formed on the substrate. When such a resistor of 1ltj is formed, the area occupied by the resistor becomes large when constructing a hybrid integrated circuit, which poses a problem that it impedes high-density packaging of the hybrid integrated circuit and prevents miniaturization.

[Means for solving problems]

The present invention solves the above-mentioned problems and provides a method for forming a resistor in a hybrid integrated circuit in which a continuous resistor is formed in a multilayer structure with an insulator interposed therebetween to achieve miniaturization.

That is, this problem can be solved by forming the resistor formed between the conductors formed on the substrate into a continuous multilayer structure with an insulator interposed therebetween.

[Effect]

The method for forming a resistor in the hybrid integrated circuit described above is that if the resistors are stacked and formed in multiple layers with an insulator interposed between them, the area of the resistor will be 172 in the case of two layers, and 1/3 if it is made in three layers.
Hybrid integrated circuits can be made smaller.

〔Example〕

FIG. 1 is a side cross-sectional view illustrating an embodiment of the thick film technology of the present invention, and parts equivalent to those in FIG. 3 are designated by the same reference numerals.

In the figure, a conductor 21 and a conductor 22 are printed on a substrate l with a predetermined gap therebetween to form a resistance. In this gap, a part of the gap on the conductor 21 side is left, and the first Fi-th resistor 3
1, and then print the first insulator so as to leave a part of the first layer resistor 31 on the side where part of the gap is left and contact the entire surface of the other part and a part of the conductor 22. The body N41 is formed by printing. Then, the second layer resistor 32 is connected to the first layer resistor 31 but not connected to the conductor 21, leaving a part of the first insulator layer 41 in contact with the conductor 22. Print and form. Furthermore, a second insulating layer 42 is formed by printing on the second layer resistor 32, with one side in contact with the conductor 21 and the other side leaving the end of the second layer resistor 32. This is a structure in which the third layer resistor 33 is printed and formed so as to be connected to the second layer resistor 32 and the conductor 21.

In other words, to put it simply, resistor 3 (31, 32, 33
) is connected to the conductor 21 and the conductor 22, and is bent, and an insulator 4 (41, 42) is interposed in the gap.
It has a layered structure.

FIG. 2 is a side sectional view illustrating an embodiment of the thin film technology of the present invention, in which the same parts as in FIG. 1 are designated by the same reference numerals.

In the figure, an insulator (not shown) is printed, dried, and sputtered at a predetermined distance between the parts formed on the substrate 1 excluding the conductor 2 and resistor 3, etc., and between the first layer resistors 31 and 31'.・Form by vapor deposition. Next, the first layer of resistor 3
After printing and drying an insulator on almost the entire surface other than the ends of the resistors 1' and the resistor 31', the first insulator layer 41 is sputtered and dried.
Deposit. Next, after removing the printed insulator by ultrasonic cleaning or the like, an insulator (not shown) is printed on the second layer resistor 32 and the conductor part, and after drying, the second layer resistor 32 is attached to the first layer. It is connected to the resistor 31' and sputtered/evaporated.

After sputtering and vapor-depositing the second insulating layer 42 by leaving the end portion on the second layer resistor 32 in the same manner, the third layer resistor 33 is replaced with the first layer resistor 33. 31 and the second layer resistor 32 by sputtering and vapor deposition. Next, the printed insulator was removed, the insulator was printed and dried on almost the entire surface other than the conductor part, and after the intermediate layer 5 and the conductor 2 were deposited, the printed insulator was removed.

The resistance value of the multilayer resistor (including thick and thin films) is adjusted by sandblasting or laser trimming.In the case of sandblasting, the entire third layer of the resistor is trimmed; By adjusting the power, you can choose to trim only the top layer to the middle or the bottom layer.

In this embodiment, the resistor 3 is described as having a three-layer structure, but it is not limited to three layers, but can also be applied to two or more layers.

[Effects of the Invention] As is clear from the above description, according to the present invention, by forming the resistor into a multilayer structure, it can be miniaturized and is extremely effective for high-density packaging.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a side sectional view illustrating an embodiment of the thick film technology of the present invention; FIG. 2 is a side sectional view illustrating an embodiment of the thin film technology of the present invention; FIG. 3 is a side sectional view of a conventional method for forming a resistor in a hybrid integrated circuit. In the figure, 1 is the substrate, 2, 21, 22 is a conductor, 3 is a resistor, 4 is an insulator, 5 is an intermediate layer, 31.31' is the first layer resistor, 32 is the second layer Resistor, 33 is the third layer resistor, 41 is the first insulator layer, 42 is the first)
Figure 2 wS3 Figure

Claims (1)

[Claims] A method for forming a resistor of a hybrid integrated circuit, characterized in that a resistor (3) formed between conductors (2) formed on a substrate (1) has a continuous multilayer structure with an insulator (4) interposed therebetween.