JPS5968916A - Laminated condenser - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a multilayer capacitor constructed by alternately stacking dielectric layers and electrode layers.

Conventional configurations and their problems Recently, as electronic components have become smaller and thinner, electronic devices equipped with these electronic components have also become smaller and thinner, whether for industrial use or general consumer use. There is a gradual trend toward thinner products, and this trend is also calling for further miniaturization and greater integration of electronic components. In capacitor parts, which are an important element in electronic components, ceramic capacitors with relatively small capacitance have shifted from the conventional disk type to chip capacitors, which can be stacked to reduce the capacitance value and size. The demand is rapidly expanding. However, even the above chip capacitor is a single discrete component, and if it is configured as one electronic component with other electronic components, there is a limit to the integration density of the electronic components. Recently, there have been nine capacitor blocks that have become a hot topic, each with a single capacitor chip that can carry multiple capacitance values. However, in this case, one circuit part in a certain electric circuit is
Since it is necessary to configure it as a block, the capacitance values that should be included in one capacitor block often vary widely. On the other hand, when manufacturing a laminated capacitor, whether by the full sheet method or the printing method, conventionally the same material is used and the required number of dielectric layers and electrode layers are constructed within it.
dielectric constant.

The thickness of the dielectric layer and the number of dielectric layers are both constant, and the capacitance value of n is determined by the size of the area.
Therefore, there is a problem in that the range of capacitance that can be obtained within a limited area is limited to a relatively narrow range. In other words, if an attempt is made to form all the capacitors of small capacity, the required area will be extremely small, making it difficult to manufacture the multilayer capacitor in the manufacturing process. When a large capacitance capacitor is required, there is a limit to the shape of the multilayer capacitor, and it is naturally impossible to obtain a capacitance value greater than the total area of the board. There was a problem in that even if a plurality of devices were attempted to be integrated, the integration density would be relatively small.

OBJECTS OF THE INVENTION The present invention attempts to overcome all of the limitations and drawbacks of the prior art as described above, and its purpose is to integrate a large number of capacitors having a wide range of capacitance values into one multilayer capacitor. be.

Structure of the Invention Is the present invention a dielectric layer? The electrode layer is divided into eight sections in the same plane, and all the divided dielectric layers are made of dielectric materials with different permittivity. , it is possible to integrate a large number of capacitors with different capacitance values over a wide range into one multilayer capacitor, making the overall product extremely compact.

M has the advantage that it is extremely easy to make it ultra-thin.

DESCRIPTION OF EMBODIMENTS FIGS. 1 and 2 show an embodiment of the multilayer capacitor of the present invention. In the figures, 1 is a base support film such as polyester, and 2r 3+ 4 is a dielectric constant. The dielectric layers 01-C5 and 01-C are each formed of different dielectric materials.
The electrode body layers are alternately laminated with layers 3 and 4 in between.

The multilayer capacitor described above can be easily manufactured according to the manufacturing process shown in FIG. That is, as shown in FIG. 3a, first, a support film 1 made of polyester or the like as a base is prepared in its entirety. Then, this support film 1
Then, a first dielectric paste, for example, a dielectric material 2 mainly composed of barium titanate having a dielectric constant of 9000, is printed in a predetermined pattern as shown in FIG. Thereafter, a dielectric paste 3 mainly composed of barium titanate having a dielectric constant of 3000 is printed as shown in FIG. 'ff: Print as shown in FIG. 3d. In this way, a dielectric layer 2 of a predetermined shape is made of, for example, three types of dielectric materials with different dielectric constants,
3.4 can be done. Therefore, after that, the stiff dielectric layers 2, 3, 4, rL, n electrode body layer CI r 02
+ 03+ Print C41C5 at the same time. Electrode body layer C
After 1, C2, C5, C4, and C5 have dried, the third
3 types of dielectric base)k printing according to figures b-d,
Thereafter, as shown in FIG. 3f, these dielectric layers 2. 3
．． Counter electrode body layer C1'+ 02'+ C
3'l C4'+C5' kPrint.

In this way, a multi-layer capacitor is created.

By repeating this process and alternately stacking electric conductor layers and electrode body layers, a multilayer multilayer capacitor can be easily obtained.

In the case of conventional multilayer capacitors in which the dielectric layer is formed from a single dielectric material, the range of capacitance values obtained is, for example, when the number of laminated layers is 10 using a dielectric material with a dielectric constant of about 3000.
It is in the range of 0.1 μF to 0.001 μF when the layer and area are 1 cyJ. Naturally, the smaller the capacitance value, the lower the integration density. On the other hand, as described above, in this embodiment, various dielectrics can be used as needed. Since it is possible to combine dielectric materials having a certain coefficient, the range of capacitance values that can be obtained can be expanded to, for example, 1 .mu.F-0.0001 .mu.F without reducing the integration density.

In addition to the effects of the invention, as is clear from the examples, the multilayer capacitor of the present invention is composed of a plurality of dielectric layers with different dielectric constants in the same plane. The range of capacitance values that can be obtained can be made significantly wider than that of conventional capacitance values, and a large number of capacitors with a large number of different capacitance values can be formed in a small size as a whole, which is extremely advantageous in practice.

[Brief explanation of drawings]

FIG. 1 is a schematic front view of one embodiment of the multilayer capacitor of the present invention, FIG. 2 is a sectional view of the same embodiment, and FIG. 3 is a diagram showing the manufacturing process for manufacturing the same capacitor. 1...Support film, 2. 3. 4...
...Dielectric layer, 01-C5, C1'-G5'...
・Electrode body layer. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 67 - Figure 3

Claims (1)

[Claims] A multilayer capacitor in which dielectric layers and electrode layers are alternately laminated, wherein each of the dielectric layers and electrode layers is divided into a plurality of layers on the same plane. A multilayer capacitor characterized in that the thin dielectric layers are each made of dielectric materials having different dielectric constants.