JPS63141387A - Manufacture of thick film circuit board - Google Patents
Manufacture of thick film circuit boardInfo
- Publication number
- JPS63141387A JPS63141387A JP61288101A JP28810186A JPS63141387A JP S63141387 A JPS63141387 A JP S63141387A JP 61288101 A JP61288101 A JP 61288101A JP 28810186 A JP28810186 A JP 28810186A JP S63141387 A JPS63141387 A JP S63141387A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- conductor
- layer
- thick film
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000004020 conductor Substances 0.000 claims description 81
- 239000010410 layer Substances 0.000 claims description 55
- 238000000034 method Methods 0.000 claims description 21
- 239000011247 coating layer Substances 0.000 claims description 11
- 238000007650 screen-printing Methods 0.000 description 8
- 239000012298 atmosphere Substances 0.000 description 7
- 239000010949 copper Substances 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- 239000012299 nitrogen atmosphere Substances 0.000 description 5
- 230000001590 oxidative effect Effects 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 4
- 238000007639 printing Methods 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 230000000740 bleeding effect Effects 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
[発明の目的]
(産業上の利用分野)
本発明は、厚膜回路基板の製造方法に関し、特に抵抗体
と第2層導体との接続工程を改良した厚膜回路基板の製
造方法に係わる。[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a method for manufacturing a thick film circuit board, and in particular to a thick film circuit with an improved connection process between a resistor and a second layer conductor. It is related to the manufacturing method of the substrate.
(従来の技術)
最近の電子機器は、小型、薄型化の傾向が目覚ましく、
この要求に応えるために、例えば厚膜技術により形成さ
れた抵抗体、導体等を有する厚膜回路基板が多用されて
いる。また、回路基板の高密度化を目的として導体の多
層化が進んでいる。(Prior art) Recent electronic devices are becoming smaller and thinner.
In order to meet this demand, thick film circuit boards having resistors, conductors, etc. formed by, for example, thick film technology are often used. Further, conductors are becoming more multi-layered in order to increase the density of circuit boards.
このような厚膜回路基板は、従来、以下に説明する第3
図(a)〜(d)に示す工程により製造されている。Conventionally, such a thick film circuit board has a third layer as described below.
It is manufactured by the steps shown in Figures (a) to (d).
まず、第3図(a)に示すように絶縁板としての例えば
アルミナ板1上に例えば酸化ルテニウム(RuO2>系
の抵抗ペーストをスクリーン印刷法により印刷し、乾燥
した後、約850℃の空気雰囲気中にて焼成を行なって
膜厚的12u、mの抵抗体2を形成する。つづいて、例
えば銅(CU)を含んだ導体ペーストをスクリーン印刷
法により印刷し、乾燥した後、約600℃の非酸化性雰
囲気、例えば窒素雰囲気中にて焼成して膜厚的17μm
の第1層導体3〜6を夫々形成する(同図(b)図示)
。ひきつづき、導体3.5間の導体4上に例えばZnO
系のガラス絶縁ペーストをスクリーン印刷法により印刷
し、乾燥した後、約600℃の非酸化性雰囲気、例えば
窒素雰囲気中で焼成して膜厚的40μmの絶縁体層7を
形成する(同図(C)図示)。次いで、銅(Cu)を含
んだ導体ペーストをスクリーン印刷法により印刷し、乾
燥した後、約600℃の非酸化性雰囲気、例えば窒素雰
囲気中にて焼成して前記絶縁体層1上に位置し、前記導
体3.5間を接続する膜厚的17μmの第2層導体8を
形成すると共に、前記抵抗体2両端とその両端近辺に位
置する導体4.6とを接続するための膜厚的17μmの
第2層導体9.10を夫々形成して厚膜回路基板を製造
する(同図(d)図示)。First, as shown in FIG. 3(a), for example, a ruthenium oxide (RuO2>-based resistance paste) is printed on, for example, an alumina plate 1 as an insulating plate by a screen printing method, and after drying, the paste is dried in an air atmosphere at about 850°C. A resistor 2 having a film thickness of 12 μm and 12 μm is formed by firing in the interior.Continuously, a conductive paste containing, for example, copper (CU) is printed by a screen printing method, and after drying, the resistor 2 is heated at about 600°C. Baked in a non-oxidizing atmosphere, such as a nitrogen atmosphere, to a film thickness of 17 μm.
The first layer conductors 3 to 6 are formed respectively (as shown in FIG. 2(b)).
. Subsequently, for example, ZnO is applied on the conductor 4 between the conductors 3.5.
A glass insulating paste of this type is printed by a screen printing method, dried, and then fired in a non-oxidizing atmosphere, such as a nitrogen atmosphere, at about 600°C to form an insulating layer 7 with a thickness of 40 μm (see FIG. C) As shown). Next, a conductive paste containing copper (Cu) is printed by a screen printing method, dried, and then fired at about 600° C. in a non-oxidizing atmosphere, such as a nitrogen atmosphere, so that it is placed on the insulating layer 1. , a second layer conductor 8 having a thickness of 17 μm is formed to connect the conductors 3.5, and a second layer conductor 8 having a thickness of 17 μm is formed to connect both ends of the resistor 2 and the conductor 4.6 located near both ends thereof. A thick film circuit board is manufactured by forming second layer conductors 9 and 10 with a thickness of 17 μm (as shown in FIG. 4D).
しかしながら、上述した従来の方法では抵抗体2と第1
層導体4.6と壷接続する第2層導体9.10を形成す
るための導体ペーストの印刷に際し、抵抗体2のエッチ
部に該抵抗体2の膜厚に相当する約12μmの段差が存
在することから、抵抗体2のエッチ部の導体ペーストに
にじみが生じる。具体的には、第2層導体9.10を形
成するための導体ペーストの印刷し、乾燥、焼成を行な
うと、第4図に示すように抵抗体2の両端と直交する辺
と前記第1層導体4.6の辺とが交わる該抵抗体2周囲
の4箇所のエツジ部において導体ペーストの抵抗体2の
中央に向かうにじみによる延出部111〜114が生じ
る。こうした延出部111〜114の長さは、約60μ
mになる場合もある。その結果、前記延出部111〜1
14の長さの大小により抵抗体2の印刷抵抗値(初期抵
抗値)のバラツキは平均値に対して±10%〜±30%
にもなるどういう問題があった。However, in the conventional method described above, the resistor 2 and the first
When printing the conductive paste for forming the second layer conductor 9.10 that connects to the layer conductor 4.6, a step of approximately 12 μm corresponding to the film thickness of the resistor 2 is present in the etched portion of the resistor 2. As a result, the conductor paste in the etched portion of the resistor 2 bleeds. Specifically, when a conductor paste for forming the second layer conductor 9.10 is printed, dried, and fired, as shown in FIG. Extending portions 111 to 114 are generated due to bleeding of the conductor paste toward the center of the resistor 2 at four edge portions around the resistor 2 where the sides of the layer conductor 4.6 intersect. The length of these extensions 111 to 114 is approximately 60 μm.
It may be m. As a result, the extension portions 111-1
Depending on the length of 14, the printed resistance value (initial resistance value) of resistor 2 will vary by ±10% to ±30% of the average value.
What kind of problem was there?
(発明が解決しようとする問題点)
本発明は、上記従来の問題点を解決するためになされた
もので、初期抵抗値のバラツキの少ない抵抗体を有する
厚膜回路基板を簡単に製造し得る方法を提供しようとす
るものである。(Problems to be Solved by the Invention) The present invention has been made to solve the above-mentioned conventional problems, and it is possible to easily manufacture a thick film circuit board having a resistor with little variation in initial resistance value. It is intended to provide a method.
[発明の構成〕
(問題点を解決するための手段)
本発明は、絶縁板上に抵抗体及び該抵抗体の両端部に近
接して配置される第1層導体を少なくとも形成する工程
と、前記抵抗体の両端部と該両端に近接する第1層導体
とを第2層導体により接続する工程を具備した厚膜回路
基板の製造方法において、前記抵抗体の両端と直交する
辺と前記第1層導体の辺とが交わる該抵抗体の周囲四隅
に、被膜層を該被膜層の前記第1層導体と反対側の辺が
前記第2層導体の抵抗体側の辺と一致もしくはそれより
抵抗体の中心側に位置するように形成することを特徴と
する厚膜回路基板の製造方法である。[Structure of the Invention] (Means for Solving the Problems) The present invention includes the steps of: forming at least a resistor and a first layer conductor disposed close to both ends of the resistor on an insulating plate; In the method for manufacturing a thick film circuit board, the method includes the step of connecting both ends of the resistor and a first layer conductor adjacent to the both ends with a second layer conductor, wherein a side orthogonal to both ends of the resistor and a first layer conductor adjacent to the ends At the four corners around the resistor where the sides of the first layer conductor intersect, apply a coating layer such that the side of the coating layer opposite to the first layer conductor matches or has a resistance higher than the side of the second layer conductor on the resistor side. This is a method of manufacturing a thick film circuit board, characterized in that the thick film circuit board is formed so as to be located on the center side of the body.
上記winの形成は、第2層導体の形成工程以前であれ
ばいかなる時でもよい。具体的には、抵抗体の形成工程
、第1層導体の形成工程、第1、第2層導体間を絶縁す
るための絶縁体層の形成工程に被膜層を形成することが
できる。かかる被膜層は、抵抗体の形成工程で形成する
場合には抵抗材料から、導体形成工程では形成する場合
には導体材料から、夫々なるが、該被膜層の機能上から
導体材料、絶縁材料等で形成しても何等差支えない。ま
た、第1!I導体の形成と同時に被膜層を形成する場合
には、該第1層導体と一体化してもよい。The win may be formed at any time before the step of forming the second layer conductor. Specifically, the coating layer can be formed in the process of forming a resistor, the process of forming a first layer conductor, and the process of forming an insulator layer for insulating between the first and second layer conductors. Such a coating layer is made of a resistive material when it is formed in a resistor forming process, and a conductive material when it is formed in a conductor forming process. There is no difference in forming the shape. Also, number 1! If the coating layer is formed simultaneously with the formation of the I conductor, it may be integrated with the first layer conductor.
(作用)
本発明によれば、抵抗体の両端と直交する辺と第1層導
体の辺とが交わる該抵抗体の周囲四隅に、被膜層を該被
膜層における前記第1層導体と反対側の辺が形成すべき
第2層導体の抵抗体側の辺と一致もしくはそれより抵抗
体の中心側に位置するように形成することよって、第2
層導体用の導体ペーストの印刷に際して該導体ペースト
の辺が交わる前記抵抗体のエッチ部の段差を前記被膜層
により緩和乃至解消できる。その結果、該抵抗体の段差
に起因する該導体ペーストのにじみによる抵抗体の中央
部側への延出を著しく抑制でき、前記延出部による抵抗
値変動の影響を少なくできるため、抵抗体の初期抵抗値
のバラツキを小さくできる。(Function) According to the present invention, a coating layer is placed at the four corners around the resistor where the sides perpendicular to both ends of the resistor intersect with the sides of the first layer conductor, on the opposite side of the coating layer from the first layer conductor. By forming the second layer conductor so that its side coincides with the resistor side side of the second layer conductor to be formed or is located closer to the center of the resistor than the side of the second layer conductor to be formed,
When printing a conductor paste for a layered conductor, the step difference in the etched portion of the resistor where the sides of the conductor paste intersect can be alleviated or eliminated by the coating layer. As a result, it is possible to significantly suppress the extension of the resistor towards the center of the resistor due to bleeding of the conductor paste due to the step difference in the resistor, and the influence of resistance value fluctuation due to the extension can be reduced. Variations in initial resistance values can be reduced.
(発明の実施例)
以下、本発明の実施例を第1図(a)〜(d)を参照し
て詳細に説明する。(Embodiments of the Invention) Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 1(a) to (d).
まず、第1図(a)に示すように絶縁板としての例えば
アルミナ板21上に例えば酸化ルテニウム(RuO2)
系の1にΩ/口の抵抗ペーストをスクリーン印刷法によ
り印刷し、乾燥した後、約850℃の空気雰囲気中にて
焼成を行なって膜厚的12μmの抵抗体22を形成した
。つづいて、例えば銅(Cu)を含んだ導体ペーストを
スクリーン印刷法により印刷し、乾燥した後、約600
℃の非酸化性雰囲気、例えば窒素雰囲気中にて焼成して
膜厚的17μmの第1層導体23〜26を夫々形成した
。First, as shown in FIG. 1(a), for example, ruthenium oxide (RuO2) is placed on an alumina plate 21 as an insulating plate.
A resistance paste of Ω/hole was printed on System 1 by screen printing, dried, and then fired in an air atmosphere at about 850° C. to form a resistor 22 with a film thickness of 12 μm. Next, a conductor paste containing, for example, copper (Cu) is printed using a screen printing method, and after drying, approximately 600
C. in a non-oxidizing atmosphere, such as a nitrogen atmosphere, to form first layer conductors 23 to 26 each having a film thickness of 17 .mu.m.
この時、前記抵抗体22の周囲四隅に前記導体24.2
6と一体化された膜厚的17μmの導体膜層27.〜2
74を形成した(同図(1))図示)。なお、これら導
体膜1!271〜274は前記導体24.26と反対側
に位置する辺が後述する工程で形成される第2WII導
体の前記抵抗体22の中心側に位置する辺と一致するよ
うに配置させた。ひきつづき、導体23.25間の導体
24上に例えばZnO系のガラス絶縁ペーストをスクリ
ーン印刷法により印刷し、乾燥した後、約600℃の非
酸化性雰囲気、例えば窒素雰囲気中で焼成して膜厚的4
0μmの絶縁体層28を形成した(同図(C)図示)。At this time, the conductor 24.2 is attached to the four corners around the resistor 22.
A conductor film layer 27.6 with a thickness of 17 μm is integrated with the conductor film layer 27.6. ~2
74 (as shown in (1) in the same figure). These conductor films 1!271-274 are arranged so that the side opposite to the conductor 24.26 coincides with the side of the second WII conductor located on the center side of the resistor 22, which will be formed in a step to be described later. It was placed in Subsequently, a ZnO-based glass insulating paste, for example, is printed on the conductor 24 between the conductors 23 and 25 by screen printing, dried, and then baked in a non-oxidizing atmosphere, for example, a nitrogen atmosphere at about 600° C. to increase the film thickness. Target 4
An insulator layer 28 having a thickness of 0 μm was formed (as shown in FIG. 3C).
次いで、前記絶縁体層28上に銅(Cu)を含んだ導体
ペーストをスクリーン印刷法により印刷すると同時に、
前記抵抗体22両端゛、その両端近辺に位置する導体2
4.26及び前記導体111層27.〜274上に印刷
した後、乾燥し、更に約600℃の非酸化性雰囲気、例
えば窒素雰囲気中にて焼成して前記導体23.25間を
接続する膜厚的17μmの第2層導体29、及び前記抵
抗体22両端とその両端近辺に位置する導体24.26
とを接続するための膜厚的17μmの第2層導体30.
31を夫々形成して厚膜回路基板を製造した(同図(d
)図示)。Next, a conductive paste containing copper (Cu) is printed on the insulating layer 28 by a screen printing method, and at the same time,
Both ends of the resistor 22, conductors 2 located near both ends of the resistor 22
4.26 and the conductor 111 layer 27. A second layer conductor 29 with a film thickness of 17 μm that connects the conductors 23.25 by printing on the conductors 23. and conductors 24 and 26 located at both ends of the resistor 22 and near both ends.
A second layer conductor 30. with a film thickness of 17 μm for connecting with.
31 was formed respectively to manufacture a thick film circuit board (see figure (d)
).
しかして、本発明によれば、第1図(d)及び抵抗体2
2付近を拡大した第2図に示すように抵抗体22の周囲
四隅に第1層導体23〜26と共に形成された導体[1
m271〜274を設けることにより、第2W!J導体
用の導体ペーストの印刷に際して該導体ペーストの辺が
交わる前記抵抗体22のエッチ部の段差を前記被m層2
71〜274により緩和乃至解消して第2層導体30.
31ににじみを減少でき、抵抗体22側に位置する辺が
直線的に形成された第2層導体30.31で抵抗体22
に接続できた。このように接続された抵抗体の初期抵抗
値をサンプル数20個測定したところ、平均値の±7%
に収まった。また、1に07口以外の抵抗ペーストを用
いた場合でも、実施例と同様、従来に比べて初期抵抗値
のバラツキの小さい抵抗体を形成できた。According to the present invention, FIG. 1(d) and the resistor 2
As shown in FIG. 2, which is an enlarged view of the area around 2, conductors [1
By providing m271 to m274, the second W! When printing a conductor paste for the J conductor, the step of the etched portion of the resistor 22 where the sides of the conductor paste intersect is
71 to 274 to relax or eliminate the second layer conductor 30.
The second layer conductor 30.31 can reduce bleeding on the resistor 22, and the side located on the resistor 22 side is formed linearly.
I was able to connect to. When the initial resistance value of the resistor connected in this way was measured for 20 samples, it was ±7% of the average value.
It fit in. Furthermore, even when a resistor paste other than No. 07 was used in Example 1, a resistor with a smaller variation in initial resistance value than the conventional one could be formed, as in the example.
なお、上記実施例では導体n層271〜274を導体2
4.26と反対側に位置する辺が形成すべき第2層導体
の抵抗体22の中心側に位置する辺と一致するように配
置したがこれに限定されない。例えば、導体膜層を第1
層導体と反対側に位置する辺が形成すべき第2層導体の
抵抗体の中心側に位置する辺より該抵抗体の中心側に配
置されるように形成してもよい。Note that in the above embodiment, the conductor n layers 271 to 274 are
Although the arrangement is such that the side opposite to 4.26 coincides with the side located on the center side of the resistor 22 of the second layer conductor to be formed, the present invention is not limited thereto. For example, the conductor film layer is
The second layer conductor may be formed so that the side opposite to the layer conductor is located closer to the center of the resistor than the side of the second layer conductor that is located closer to the center of the resistor.
[発明の効果]
以上詳述した如く、本発明によれば初期抵抗値のバラツ
キの少ない抵抗体を有し、抵抗体の形成管理を容易に行
なえる厚膜回路基板の製造方法を提供できる。[Effects of the Invention] As described in detail above, according to the present invention, it is possible to provide a method for manufacturing a thick film circuit board that has a resistor with little variation in initial resistance value and can easily manage the formation of the resistor.
第1図(a)〜(d)は本発明の実施例における厚膜回
路基板の製造工程を示す平面図、第2図は第1図(d)
の抵抗体付近の拡大平面図、第2図(a)〜(d)は従
来法における厚膜回路基板の製造工程を示す平面図、第
4図は第3図(d)の抵抗体付近の拡大平面図である。
21・・・アルミナ板、22・・・抵抗体、23〜26
・・・第1層導体、271〜214・・・導体膜層、2
9〜31・・・第2層導体。
出願人代理人 弁理士 鈴江武彦
(a) (d)第1図
(a) (d)(C)
第3図
手続補正書(旗)
62、3.10
昭和 年 月 日
特許庁長官 黒 1)明 雄 殿
1、事件の表示
特願昭61−288101号
2、発明の名称
厚膜回路基板の製造方法
3、補正をする者
事件との関係 特許出願人
(307) 株式会社 東芝
4、代理人
7、補正の内容
(1) 明細書第10頁第9行目乃至第10行目に[
第2図(a) 〜(d)Jとあるを「第3図(a) 〜
(d) −1と訂正する。Figures 1 (a) to (d) are plan views showing the manufacturing process of a thick film circuit board in an embodiment of the present invention, and Figure 2 is Figure 1 (d).
2(a) to (d) are plan views showing the manufacturing process of a thick film circuit board by the conventional method. FIG. 4 is an enlarged plan view of the vicinity of the resistor in FIG. 3(d). FIG. 21...Alumina plate, 22...Resistor, 23-26
...First layer conductor, 271-214...Conductor film layer, 2
9-31...Second layer conductor. Applicant's agent Patent attorney Takehiko Suzue (a) (d) Figure 1 (a) (d) (C) Figure 3 procedural amendment (flag) 62, 3.10 Showa year Mon/Japan Commissioner of the Japan Patent Office Black 1) Yu Akira 1, Indication of the case Patent Application No. 1988-288101 2, Name of the invention Method for manufacturing thick film circuit board 3, Person making the amendment Relationship with the case Patent applicant (307) Toshiba Corporation 4, Agent 7. Contents of amendment (1) [
Figure 2 (a) - (d) J is replaced with "Figure 3 (a) -
(d) Correct it to -1.
Claims (2)
して配置される第1層導体を少なくとも形成する工程と
、前記抵抗体の両端部と該両端に近接する第1層導体と
を第2層導体により接続する工程を具備した厚膜回路基
板の製造方法において、前記抵抗体の両端と直交する辺
と前記第1層導体の辺とが交わる該抵抗体の周囲四隅に
、被膜層を該被膜層の前記第1層導体と反対側の辺が前
記第2層導体の抵抗体側の辺と一致もしくはそれより抵
抗体の中心側に位置するように形成することを特徴とす
る厚膜回路基板の製造方法。(1) forming at least a resistor and a first layer conductor disposed close to both ends of the resistor on an insulating plate; In the method for manufacturing a thick film circuit board, which includes the step of connecting a conductor with a second layer conductor, the resistor is connected to the resistor at four corners around the resistor where sides orthogonal to both ends of the resistor intersect with sides of the first layer conductor. , the coating layer is formed such that the side of the coating layer opposite to the first layer conductor is aligned with the side of the second layer conductor on the resistor side or is located closer to the center of the resistor than the side of the second layer conductor on the resistor side. A method for manufacturing a thick film circuit board.
特徴とする特許請求の範囲第1項記載の厚膜回路基板の
製造方法。(2) The method for manufacturing a thick film circuit board according to claim 1, characterized in that the coating layer is formed integrally with the first layer conductor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61288101A JPS63141387A (en) | 1986-12-03 | 1986-12-03 | Manufacture of thick film circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61288101A JPS63141387A (en) | 1986-12-03 | 1986-12-03 | Manufacture of thick film circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63141387A true JPS63141387A (en) | 1988-06-13 |
Family
ID=17725805
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61288101A Pending JPS63141387A (en) | 1986-12-03 | 1986-12-03 | Manufacture of thick film circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63141387A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04309286A (en) * | 1991-04-08 | 1992-10-30 | Murata Mfg Co Ltd | Manufacture of thick film multilayer circuit board |
-
1986
- 1986-12-03 JP JP61288101A patent/JPS63141387A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04309286A (en) * | 1991-04-08 | 1992-10-30 | Murata Mfg Co Ltd | Manufacture of thick film multilayer circuit board |
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