JPH0210548B2 - - Google Patents
Info
- Publication number
- JPH0210548B2 JPH0210548B2 JP55173434A JP17343480A JPH0210548B2 JP H0210548 B2 JPH0210548 B2 JP H0210548B2 JP 55173434 A JP55173434 A JP 55173434A JP 17343480 A JP17343480 A JP 17343480A JP H0210548 B2 JPH0210548 B2 JP H0210548B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- conductor
- reduced
- chip component
- end faces
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004020 conductor Substances 0.000 claims description 28
- 239000004065 semiconductor Substances 0.000 claims description 25
- 239000000919 ceramic Substances 0.000 claims description 21
- 239000010410 layer Substances 0.000 description 36
- 229910052573 porcelain Inorganic materials 0.000 description 18
- 238000010405 reoxidation reaction Methods 0.000 description 9
- 239000002184 metal Substances 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000000758 substrate Substances 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 238000009413 insulation Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000011282 treatment Methods 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 239000000843 powder Substances 0.000 description 4
- 239000011241 protective layer Substances 0.000 description 4
- 239000010953 base metal Substances 0.000 description 3
- 238000010292 electrical insulation Methods 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910001252 Pd alloy Inorganic materials 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 229910052454 barium strontium titanate Inorganic materials 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical group [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- -1 electrode breakage Substances 0.000 description 1
- 239000002003 electrode paste Substances 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Description
【発明の詳細な説明】
本発明は、プリント回路基板上の配線を交叉さ
せる時に用いるチツプ部品に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a chip component used for crossing wiring on a printed circuit board.
此種のチツプ部品は、ジヤンパチツプ部品とも
称され、小形平板状で絶縁性が高く、平面状の導
体パターンに直接ボンデングして配線をクロスさ
せることができるため、回路の厚膜IC化やモジ
ユール化の一担を担う部品として、電子計算機、
通信機、テレビ受像機、ラジオ受信機、電子時
計、電卓などの各種の電子機器に広く利用されつ
つある。 This type of chip component, also called a jumper chip component, is small and flat, has high insulation properties, and can be directly bonded to a flat conductor pattern to cross wiring, making it suitable for thick-film IC and modular circuits. Electronic computers, as parts that play a role in
It is becoming widely used in various electronic devices such as communication devices, television receivers, radio receivers, electronic clocks, and calculators.
第１図は従来の此種のチツプ部品とその使用態
様を説明する図で、チツプ部品１は、矩形平板状
等に形成されたアルミナ磁器基板２の相対向する
両端部にAg−Pd合金等より成る一対の端部電極
３，４を被着形成すると共に、前記磁器基板２の
一面上に前記端部電極３，４間を橋絡する導体５
を被着し、この導体５の表面の大部分を、ガラス
質保護層６で被覆した構造となつている。そして
このチツプ部品１は、プリント回路基板７上で２
つのプリント配線８と配線９−９とを交叉させる
際、一方の配線８を跨いで他の配線９−９に端部
電極３，４を半田付け１０，１１ｉ、配線９−９
間を短絡するものである。 FIG. 1 is a diagram illustrating a conventional chip component of this kind and its usage mode.A chip component 1 has an alumina porcelain substrate 2 formed into a rectangular flat plate shape, etc., and has Ag-Pd alloy, etc. on both opposing ends thereof. A conductor 5 is formed on one surface of the ceramic substrate 2 to bridge between the end electrodes 3 and 4.
The structure is such that most of the surface of the conductor 5 is covered with a glass protective layer 6. Then, this chip component 1 is mounted on the printed circuit board 7.
When crossing one printed wiring 8 and wiring 9-9, solder the end electrodes 3 and 4 to the other wiring 9-9 by straddling one wiring 8 and soldering the wiring 9-9.
It short-circuits between
しかし、この従来のチツプ部品は、導体５を磁
器基板２の表面上に設け、該導体５の表面にガラ
ス質保護層６をコーテイングする構造であるため
導体５の半田喰われ現象、半田付け時等のヒート
シヨツクによるクラツクの発生、界面剥離等を防
止することができず、信頼性に問題があること、
磁器基板２と保護層６とが材質的に異なるため、
これらを別々の工程で形成しなければならず、製
造工程の複雑化や製造コストアツプを招くこと、
保護層６と磁器基板２との材質の差異から、両者
の界面に剥離等を生じ、湿気の侵入により導体５
の絶縁性、耐薬品性等が劣化し易いこと等々の欠
点があつた。 However, since this conventional chip component has a structure in which the conductor 5 is provided on the surface of the ceramic substrate 2 and the glass protective layer 6 is coated on the surface of the conductor 5, the solder of the conductor 5 may be eaten away during soldering. It is not possible to prevent cracks caused by heat shock, interfacial peeling, etc., resulting in reliability problems.
Since the ceramic substrate 2 and the protective layer 6 are different in material,
These must be formed in separate processes, complicating the manufacturing process and increasing manufacturing costs;
Due to the difference in materials between the protective layer 6 and the ceramic substrate 2, peeling occurs at the interface between the two, and the conductor 5 is damaged due to moisture intrusion.
However, there were drawbacks such as the tendency for the insulation properties and chemical resistance to deteriorate.
この欠点を除去するものとして、第２図に示す
ように、導体５を磁器基板２の内部に埋設したも
のが提案されている。このチツプ部品において、
導体５を形成する場合、金属粉末を有機質ビヒク
ル中に均一に分散させた電極ペーストを使用し、
これを磁器基板２と同時焼成しなければならない
から、前記金属粉末としては、磁器の焼結温度以
上の融点を有し、しかも自然雰囲気中で1250℃〜
1400℃の温度で焼成しても磁器と接触して酸化し
たりまたは反応を起さない金属材料を使用するこ
とが条件となる。この条件を満足する金属粉末と
して、従来は、白金、パラジウムもしくはこれら
の合金またはこれらと銀の合金等を用いていた。
しかし、これらの金属粉末は甚だ高価であるた
め、大幅なコストアツプを招き、コスト的に実用
性のないものとなつていた。 In order to eliminate this drawback, a method has been proposed in which a conductor 5 is buried inside a ceramic substrate 2, as shown in FIG. In this chip part,
When forming the conductor 5, an electrode paste in which metal powder is uniformly dispersed in an organic vehicle is used,
Since this must be fired at the same time as the porcelain substrate 2, the metal powder must have a melting point higher than the sintering temperature of the porcelain, and must be 1250°C to 1250°C in a natural atmosphere.
The condition is to use a metal material that does not oxidize or react with porcelain even when fired at a temperature of 1400°C. Conventionally, platinum, palladium, an alloy thereof, or an alloy of these and silver has been used as a metal powder satisfying this condition.
However, these metal powders are extremely expensive, leading to a significant increase in cost, making them impractical in terms of cost.
このコストアツプの問題点を解決するため、導
体５を銅、ニツケルまたはアルミニウムなどの安
価な卑金属材料によつて構成する試みもなされて
いるが、これらの卑金属材料は自然雰囲気中で焼
成した場合、酸化されて導体としての機能を失う
ため、特殊雰囲気中で焼成しなければならないこ
と、焼成の過程で卑金属粒子の異常粒成長、電極
切れ、巣等が発生し、緻密で信頼性の高い導体を
形成することが困難であること等の問題点があ
る。 In order to solve this cost increase problem, attempts have been made to construct the conductor 5 from inexpensive base metal materials such as copper, nickel, or aluminum, but these base metal materials oxidize when fired in a natural atmosphere. It is necessary to sinter it in a special atmosphere because it loses its function as a conductor. During the sintering process, abnormal grain growth of base metal particles, electrode breakage, cavities, etc. occur, forming a dense and highly reliable conductor. There are problems such as the fact that it is difficult to do so.
また、内部導体構造のチツプ部品は、磁器基板
２となる磁器ペーストと導体５となる金属ペース
トとを、スクリーン印刷法、ロールコータ法また
は転写法等により交互に塗布積層しなければなら
ないため、製造工程が多く、かつ複雑になる欠点
もある。 In addition, for chip parts with an internal conductor structure, the ceramic paste that becomes the ceramic substrate 2 and the metal paste that becomes the conductor 5 must be applied and laminated alternately using a screen printing method, a roll coater method, a transfer method, etc. It also has the disadvantage that there are many steps and it is complicated.
本発明は上述する従来の欠点を除去し、製造工
程の大幅な短縮、低コスト化が可能で、しかも電
気的特性の安定した導体を有するチツプ部品を提
供することを目的とする。 SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned conventional drawbacks, to significantly shorten the manufacturing process and to reduce costs, and to provide a chip component having a conductor with stable electrical characteristics.
この目的を達成するため、本発明に係るチツプ
部品は、還元再酸化形の半導体磁器で構成され、
前記半導体磁器の還元層を、前記半導体磁器に付
与される少なくとも一対の端部電極を互いに導通
させる導体としたチツプ部品であつて、
前記半導体磁器は、平板状に形成されていて、
その側面側の相対する両端面に還元層が露出して
おり、前記両端面を除く表面の全面が再酸化層に
よつて覆われており、
前記端部電極は、前記還元層の露出する前記両
端面において前記還元層に導通するように付与さ
れていること
を特徴とする。 To achieve this objective, the chip component according to the present invention is composed of reduced and reoxidized semiconductor porcelain,
A chip component in which the reduction layer of the semiconductor ceramic is a conductor that connects at least a pair of end electrodes provided to the semiconductor ceramic with each other, the semiconductor ceramic being formed into a flat plate shape,
A reduced layer is exposed on both opposing end faces on the side surface, and the entire surface except for the both end faces is covered with a re-oxidized layer, and the end electrode is connected to the exposed reduced layer. It is characterized in that it is provided so as to be electrically conductive to the reduction layer on both end faces.
還元再酸化形の半導体磁器は、一般に、チタン
酸バリウムまたはチタン酸ストロンチウム等を主
成分とする磁器材料を、1350℃〜1400℃の温度で
２時間程度焼成して焼結体を得た後、該焼結体を
還元雰囲気中で約1100℃の温度で２時間程度熱処
理して強制還元し、こうして得られた半導体磁器
の表面にガラスフリツト成分等を塗布した後800
〜850℃の温度で約２時間程度酸素雰囲気中で熱
処理することにより、ガラスフリツト成分を半導
体磁器の表面に液相拡散させ、再酸化層を形成さ
せることによつて得られる。この場合、表面の再
酸化層は強制還元前の磁器絶縁層となるが、再酸
化されていない還元層は一種の半導体層となる。 Reduced and reoxidized semiconductor porcelain is generally made by firing a porcelain material whose main component is barium titanate or strontium titanate at a temperature of 1350°C to 1400°C for about 2 hours to obtain a sintered body. The sintered body was heat-treated in a reducing atmosphere at a temperature of about 1100°C for about 2 hours to undergo forced reduction, and after coating the surface of the semiconductor porcelain obtained in this way with a glass frit component, etc.
It is obtained by performing a heat treatment in an oxygen atmosphere at a temperature of 850 DEG C. for about 2 hours to diffuse the glass frit component into the surface of the semiconductor ceramic in a liquid phase and form a reoxidized layer. In this case, the reoxidized layer on the surface becomes a porcelain insulating layer before forced reduction, but the reduced layer that is not reoxidized becomes a kind of semiconductor layer.
本発明においては、この還元層を端部電極３，
４を橋絡させる導体５として利用するものであ
る。このような構成であると、端部電極を導通さ
せるための金属導体が不要となり、磁器単独構造
となるから、製造工程の大幅な短縮および低コス
ト化が可能で、しかも特性の安定した高信頼性の
ジヤンパチツプ部品を提供することができる。 In the present invention, this reduced layer is connected to the end electrode 3,
It is used as a conductor 5 that bridges the conductor 4. With this configuration, there is no need for a metal conductor to conduct the end electrodes, and the structure is made solely of porcelain, making it possible to significantly shorten the manufacturing process and reduce costs, as well as to achieve high reliability with stable characteristics. We can provide flexible jumper chip parts.
半導体磁器は、その側面側の相対する両端面に
還元層が露出しており、前記両端面を除く表面の
全面が再酸化層によつて覆われており、端部電極
は、還元層の露出する両端面において還元層に導
通するように付与されている。このような構造で
あると、半導体磁器の表面に、他の絶縁処理を施
すことなく、クロスする外部導体との間に、充分
な電気絶縁を確保できる。また、半導体磁器の有
する再酸化層を絶縁層として用いるので、薄形に
なり、面付け実装に適した薄形のジヤンパチツプ
部品が得られる。 Semiconductor porcelain has a reduced layer exposed on both opposing end faces on its side surfaces, and the entire surface except for the two end faces is covered with a re-oxidized layer. It is provided so as to be electrically conductive to the reduction layer at both end faces. With such a structure, sufficient electrical insulation can be ensured between the cross-crossing external conductor and the surface of the semiconductor ceramic without performing any other insulation treatment. Furthermore, since the reoxidation layer of the semiconductor ceramic is used as an insulating layer, a thin jumper chip component suitable for surface mounting can be obtained.
以下実施例たる添付図面を参照し、本発明の内
容を具体的に説明する。第３図Ａは本発明に係る
チツプ部品の平面図、第３図Ｂは第３図ＡのB1
−B1線上における断面図、第３図Ｃは第３図Ａ
のB2−B2線上における断面図、第４図は部分欠
損斜視図である。図において１２は還元再酸化形
の半導体磁器であり、この実施例では、略矩形状
の平板状に形成してある。該半導体磁器１２は一
対の端部電極３，４を形成した両端面を除く表面
の全面を、再酸化層イで覆つてあり、該再酸化層
イによつて囲まれた中央部に還元層ロを形成した
両端面にそれぞれ露出させ、該両端面で端部電極
３，４に導通させてある。したがつて、端部電極
３，４は還元層ロを導体として互に導通すること
となる。 DESCRIPTION OF THE PREFERRED EMBODIMENTS The content of the present invention will be specifically described below with reference to the accompanying drawings, which are examples. FIG. 3A is a plan view of a chip component according to the present invention, and FIG. 3B is B 1 of FIG. 3A.
-B Cross-sectional view on line 1 , Figure 3C is Figure 3A
FIG . 4 is a partially cutaway perspective view. In the figure, reference numeral 12 denotes a reduced and reoxidized semiconductor ceramic, and in this embodiment, it is formed into a substantially rectangular flat plate shape. The entire surface of the semiconductor ceramic 12 except for both end faces on which the pair of end electrodes 3 and 4 are formed is covered with a reoxidation layer A, and a reduction layer is formed in the center surrounded by the reoxidation layer A. It is exposed at both end faces where a groove is formed, and electrically connected to the end electrodes 3 and 4 at both end faces. Therefore, the end electrodes 3 and 4 are electrically connected to each other using the reduced layer B as a conductor.
このように、本発明においては、還元再酸化形
半導体磁器の還元層ロを、端部電極３，４を導通
させる導体として活用するものであるから、従来
のような金属導体が全く不要である。このため、
金属導体とした場合の前述の諸欠点が全て一掃さ
れ、信頼性が高く、安価なジヤンパチツプ部品が
実現される。また磁器に対して還元再酸化処理を
施すだけで良いので、製造工程が大幅に短縮され
ると同時に簡素化される。 In this way, in the present invention, the reduced layer B of the reduced and reoxidized semiconductor porcelain is utilized as a conductor for electrically connecting the end electrodes 3 and 4, so there is no need for a conventional metal conductor. . For this reason,
All of the above-mentioned drawbacks when using metal conductors are eliminated, and a highly reliable and inexpensive jumper chip component is realized. Furthermore, since it is sufficient to simply subject the porcelain to reduction and reoxidation treatment, the manufacturing process is greatly shortened and simplified.
更に、半導体磁器１２は、還元層ロを露出させ
た両端面を除く表面の全面が再酸化層イによつて
覆われているので、半導体磁器１２の表面に絶縁
塗料を塗布する等、他の絶縁処理を施すことな
く、クロスする外部導体との間に、充分な電気絶
縁を確保できる。また、半導体磁器１２の有する
再酸化層イを絶縁層として用いるので、薄形にな
り、面付け実装に適した薄形のジヤンパチツプ部
品が得られる。 Furthermore, since the entire surface of the semiconductor porcelain 12 except for both end faces where the reduction layer B is exposed is covered with the reoxidation layer A, other treatments such as applying an insulating paint to the surface of the semiconductor porcelain 12 may be applied. Sufficient electrical insulation can be ensured between crossing external conductors without performing insulation treatment. Further, since the reoxidation layer I of the semiconductor ceramic 12 is used as an insulating layer, a thin jumper chip component suitable for surface mounting can be obtained.
なお、実施例では、端部電極３，４のある両端
部の隅部に切欠１３〜１６を設けてある。 In the embodiment, cutouts 13 to 16 are provided at the corners of both ends where the end electrodes 3 and 4 are located.
このような構造であると、自動装着機のマガジ
ンに積層充填して自動装着する場合、マガジンに
対してスムーズに装填することができる。 With this structure, when stacking and filling a magazine of an automatic loading machine and automatically loading the magazine, the magazine can be loaded smoothly.
以上述べたように、本発明によれば、次のよう
な効果が得られる。 As described above, according to the present invention, the following effects can be obtained.
(a) 半導体磁器は、平板状に形成されていて、そ
の側面側の相対する両端面に還元層が露出して
おり、両端面を除く表面の全面が再酸化層によ
つて覆われており、端部電極は、還元層の露出
する両端面において還元層に導通するように付
与されているので、製造工程の大幅な短縮及び
低コスト化が可能で、特性の安定した高信頼度
のジヤンパチツプ部品を提供できる。(a) Semiconductor porcelain is formed in the shape of a flat plate, with a reduced layer exposed on both opposing end faces on the side faces, and the entire surface except for both end faces covered with a reoxidized layer. Since the end electrodes are provided so as to be electrically conductive to the reduced layer on both exposed end surfaces of the reduced layer, it is possible to significantly shorten the manufacturing process and reduce costs, and to create a highly reliable jumper chip with stable characteristics. We can provide parts.
(b) 半導体磁器は、還元層を露出させた両端面を
除く表面の全面を再酸化層によつて覆つてある
から、半導体磁器の表面に、他の絶縁処理を施
すことなく、クロスする外部導体との間に、充
分な電気絶縁を確保し得るジヤンパチツプ部品
を提供できる。(b) Since the entire surface of semiconductor porcelain is covered with a reoxidation layer, except for both end faces where the reduced layer is exposed, the surface of semiconductor porcelain is covered with a cross-over external layer without any other insulation treatment. It is possible to provide a jumper chip component that can ensure sufficient electrical insulation between the conductor and the conductor.
(c) 再酸化層を絶縁層として用いたことにより、
面付け実装に適した薄形のジヤンパチツプ部品
を提供できる。(c) By using the reoxidation layer as an insulating layer,
Thin jumper chip components suitable for surface mounting can be provided.
第１図は従来のチツプ部品とその使用方法を説
明する図、第２図は従来のチツプ部品の断面図、
第３図Ａは本発明に係るチツプ部品の平面図、第
３図Ｂ，Ｃは第３図ＡのB1−B1線、B2−B2線上
における各断面図、第４図は本発明に係るチツプ
部品の部分欠損斜視図である。
３，４……端部電極、１２……半導体磁器、イ
……再酸化層、ロ……還元層。
Figure 1 is a diagram explaining conventional chip parts and how to use them, Figure 2 is a sectional view of conventional chip parts,
3A is a plan view of a chip component according to the present invention, FIGS. 3B and 3C are cross-sectional views taken along lines B1 - B1 and B2 - B2 of FIG. 3A, and FIG. FIG. 2 is a partially cutaway perspective view of a chip component according to the invention. 3, 4... End electrode, 12... Semiconductor ceramic, A... Reoxidation layer, B... Reduction layer.
Claims (1)
半導体磁器の還元層を、前記半導体磁器に付与さ
れる少なくとも一対の端部電極を互いに導通させ
る導体としたチツプ部品であつて、 前記半導体磁器は、平板状に形成されていて、
その側面側の相対する両端面に還元層が露出して
おり、前記両端面を除く表面の全面が再酸化層に
よつて覆われており、 前記端部電極は、前記還元層の露出する前記両
端面において前記還元層に導通するように付与さ
れていること を特徴とするチツプ部品。[Scope of Claims] 1. A chip component made of reduced and reoxidized semiconductor ceramic, with a reduced layer of the semiconductor ceramic serving as a conductor that connects at least a pair of end electrodes provided to the semiconductor ceramic with each other. The semiconductor ceramic is formed into a flat plate shape,
A reduced layer is exposed on both opposing end faces on the side surface, and the entire surface except for the both end faces is covered with a re-oxidized layer, and the end electrode is connected to the exposed reduced layer. A chip component characterized in that both end faces are provided so as to be electrically conductive to the reduction layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17343480A JPS5796587A (en) | 1980-12-08 | 1980-12-08 | Chip part |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17343480A JPS5796587A (en) | 1980-12-08 | 1980-12-08 | Chip part |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5796587A JPS5796587A (en) | 1982-06-15 |
| JPH0210548B2 true JPH0210548B2 (en) | 1990-03-08 |
Family
ID=15960383
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17343480A Granted JPS5796587A (en) | 1980-12-08 | 1980-12-08 | Chip part |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5796587A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0572831A (en) * | 1991-09-17 | 1993-03-26 | Matsushita Electric Ind Co Ltd | Image forming device |
| JPH0581844U (en) * | 1992-04-06 | 1993-11-05 | 京セラ株式会社 | Electrophotographic device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS491731U (en) * | 1972-04-11 | 1974-01-09 |
-
1980
- 1980-12-08 JP JP17343480A patent/JPS5796587A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS491731U (en) * | 1972-04-11 | 1974-01-09 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0572831A (en) * | 1991-09-17 | 1993-03-26 | Matsushita Electric Ind Co Ltd | Image forming device |
| JPH0581844U (en) * | 1992-04-06 | 1993-11-05 | 京セラ株式会社 | Electrophotographic device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5796587A (en) | 1982-06-15 |
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