JPS62107525U - - Google Patents
Info
- Publication number
- JPS62107525U JPS62107525U JP19738885U JP19738885U JPS62107525U JP S62107525 U JPS62107525 U JP S62107525U JP 19738885 U JP19738885 U JP 19738885U JP 19738885 U JP19738885 U JP 19738885U JP S62107525 U JPS62107525 U JP S62107525U
- Authority
- JP
- Japan
- Prior art keywords
- gate
- channel
- channel fet
- constant current
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Emergency Protection Circuit Devices (AREA)
Description
第１図は本考案による過電流過電圧保護回路の
基本構成を示す回路図、第２図は第１図中の定電
流ダイオードの電圧電流特性を示すグラフ、第３
図は第１図の回路の電圧電流特性を示すグラフ、
第４図は本考案の他の実施例を示す回路図、第５
図は従来例を示すブロツク回路図、及び第６図は
従来の電圧電流特性と理想特性を示すグラフであ
る。
１１，１２，２１〜２４……ＮチヤンネルＦＥ
Ｔ、１３，２５，２６……ＰチヤンネルＦＥＴ、
１４，１５，２７，２８……定電流ダイオード、
１６〜２０，２９〜３８……ダイオード。
Figure 1 is a circuit diagram showing the basic configuration of the overcurrent/overvoltage protection circuit according to the present invention, Figure 2 is a graph showing the voltage-current characteristics of the constant current diode in Figure 1, and Figure 3 is a graph showing the voltage-current characteristics of the constant current diode in Figure 1.
The figure is a graph showing the voltage-current characteristics of the circuit in Figure 1.
FIG. 4 is a circuit diagram showing another embodiment of the present invention;
The figure is a block circuit diagram showing a conventional example, and FIG. 6 is a graph showing conventional voltage-current characteristics and ideal characteristics. 11, 12, 21-24...N channel FE
T, 13, 25, 26...P channel FET,
14, 15, 27, 28...constant current diode,
16-20, 29-38...Diode.
Claims (1)
極側にカソードをそれぞれ接続した定電流ダイオ
ードと、 該定電流ダイオードのアノード電極側にソース
、ドレインをそれぞれ接続した２つのＮチヤンネ
ルＦＥＴと、 前記ＰチヤンネルＦＥＴのゲートに常に正のバ
イアスを与え、前記２つのＮチヤンネルＦＥＴの
各々のゲートに両方向に対しゲート電圧がそれぞ
れ負になるようにバイアスを与えるダイオードか
らなるバイアス回路とを備えることを特徴とする
過電流過電圧保護回路。[Claims for Utility Model Registration] A P-channel FET, a constant current diode whose cathode is connected to both the source and drain electrodes of the P-channel FET, and a source and drain connected to the anode side of the constant current diode, respectively. two N-channel FETs, and a diode that always applies a positive bias to the gate of the P-channel FET and biases the gate of each of the two N-channel FETs so that the gate voltage is negative in both directions. An overcurrent/overvoltage protection circuit comprising: a bias circuit;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19738885U JPH0314924Y2 (en) | 1985-12-24 | 1985-12-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19738885U JPH0314924Y2 (en) | 1985-12-24 | 1985-12-24 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62107525U true JPS62107525U (en) | 1987-07-09 |
| JPH0314924Y2 JPH0314924Y2 (en) | 1991-04-02 |
Family
ID=31157076
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19738885U Expired JPH0314924Y2 (en) | 1985-12-24 | 1985-12-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0314924Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3870808B2 (en) * | 2002-03-19 | 2007-01-24 | 株式会社豊田自動織機 | Method and circuit for protecting switching element for solenoid drive |
-
1985
- 1985-12-24 JP JP19738885U patent/JPH0314924Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0314924Y2 (en) | 1991-04-02 |
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