JPS62104450U - - Google Patents

Info

Publication number
JPS62104450U
JPS62104450U JP19616385U JP19616385U JPS62104450U JP S62104450 U JPS62104450 U JP S62104450U JP 19616385 U JP19616385 U JP 19616385U JP 19616385 U JP19616385 U JP 19616385U JP S62104450 U JPS62104450 U JP S62104450U
Authority
JP
Japan
Prior art keywords
terminal
semiconductor device
semiconductor chip
envelope
enclosure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19616385U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19616385U priority Critical patent/JPS62104450U/ja
Publication of JPS62104450U publication Critical patent/JPS62104450U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案の一実施例による半導体装置の
斜視図、第２図および第３図は第１図の―線
断面図および―線断面図、第４図は同半導体
装置の実装状態の断面図、第５図は本考案の他の
実施例による半導体装置の平面図、第６図乃至第
９図は従来例の半導体装置を示す図である。 １……外囲器、２……端子孔、３……接続端子
、４……ボンデイングワイヤ、５……半導体チツ
プ、７……接続用孔、９……外部端子。

Claims (1)

  1. 【実用新案登録請求の範囲】 １ 半導体チツプと、 この半導体チツプと電気的に接続され、先端部
    に接続用孔が形成された接続端子と、 前記半導体チツプおよび接続端子の全長を封止
    する外囲器とを備え、 前記外囲器に、前記接続端子の接続用孔に連通
    すると共に外部端子が挿入される端子孔が形成さ
    れていることを特徴とする半導体装置。 ２ 実用新案登録請求の範囲第１項記載の装置に
    おいて、 前記端子孔が前記外囲器の対向する２辺に形成
    されていることを特徴とする半導体装置。 ３ 実用新案登録請求の範囲第１項記載の装置に
    おいて、 前記端子孔が前記外囲器の４辺に形成されてい
    ることを特徴とする半導体装置。
JP19616385U 1985-12-20 1985-12-20 Pending JPS62104450U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19616385U JPS62104450U (ja) 1985-12-20 1985-12-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19616385U JPS62104450U (ja) 1985-12-20 1985-12-20

Publications (1)

Publication Number Publication Date
JPS62104450U true JPS62104450U (ja) 1987-07-03

Family

ID=31154729

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19616385U Pending JPS62104450U (ja) 1985-12-20 1985-12-20

Country Status (1)

Country Link
JP (1) JPS62104450U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017133941A1 (de) * 2016-02-05 2017-08-10 Robert Bosch Gmbh Moldmodul, verfahren zur herstellung eines moldmoduls und moldwerkzeug für die moldumspritzung eines moldmoduls

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017133941A1 (de) * 2016-02-05 2017-08-10 Robert Bosch Gmbh Moldmodul, verfahren zur herstellung eines moldmoduls und moldwerkzeug für die moldumspritzung eines moldmoduls

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