JPS62104221A - Drift compensation circuit for a/d converter - Google Patents

Abstract

PURPOSE:To eliminate the need for a detection circuit of a digital value '0' and a latch circuit and to simplify the circuit constitution by applying drift compensation as the result of AND between the state of a sign bit of an A/D converter and an output of a drift compensation control circuit so as to easily change the compensation quantity. CONSTITUTION:An output sign bit (e) of an A/D converter 1 and an output (j) of a drift compensation control circuit 3 are ANDed by a sign bit discrimination circuit 2 and the output of the sign bit discrimination circuit 2 is sign but discrimination signal k='1' and l='0'. A switch circuit 4 is turned on by the output and an output voltage i is a negative voltage -V. The output Vi is inputted to an integration circuit 5, where it is integrated and its output is Vo. A comparator (built-in) input of the A/D converter 1 receives the negative voltage Vo outputted from the integration circuit 5 and becomes a negative voltage and the output of the A/D converter 1 approaches a digital value '0' at the next A/D conversion. This is similar when the drift is negative.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drift compensation circuit for an analog/digital (A/D) converter.

[Conventional technology]

Conventionally, drift compensation of an A/D converter has been achieved either by fixing the comparator input of the A/D converter in a direct current manner, or by using a latch circuit 7 and an OR circuit 8 that detects digital O as shown in FIG. , a digital value polarity determination AND circuit 9 that determines the polarity of a digital value, a switch circuit 10 that switches a voltage for drift compensation, and a switch circuit 10
The integration circuit 1 is composed of an integration circuit 11 that integrates the output of the integration circuit 1.
This is done by a drift compensation circuit in which the output of 1 is connected to the comparator input of the A/D converter 6.

Analog input signal a is converted to A/ by convert command b.
A/D conversion is performed by the D converter 6, and the converted digital value d is latched in the latch circuit 7 by the latch signal C. If the digital value d latched by the latch circuit 7 is positive, that is, the sign bit of the digital value d is 0, and the digital O detection signal f which is the output of the OR circuit 8 is "1", the AND circuit 8 The output signal g becomes "1", the output signal ri becomes "0°", and a negative voltage -
(2) is output to the integrating circuit 11. When the digital value d is negative, a positive voltage +V is output from the switch circuit 10 to the integrating circuit 11. Also, the digital value d is “O°゛,
That is, if the digital 0 detection signal f becomes 000, the switch circuit 10 becomes an open circuit. The integrating circuit 11 integrates the output voltage +V or -V of the switch circuit 10, and its output is the average value of the positive and negative ratios of the digital values,
The comparator input signal i of the A/D converter 6 is controlled so that Ov of the analog input signal a settles to "0" of the digital value d.

[Problem that the invention seeks to solve]

The conventional A/D converter drift compensation circuit described above has A
Since drift compensation is performed after latching the /D-converted digital value in the latch circuit, there is a drawback that a delay of l samples occurs.Also, since compensation is always performed when the digital value is other than O, overcompensation may occur. The drawback is that drift compensation is difficult to stabilize.

[Means for solving problems]

A drift compensation circuit for an A/D converter according to the present invention includes a drift compensation amount control circuit that outputs a drift compensation amount control signal only for a preset period, and an A/D converter that outputs a drift compensation amount control signal during a period when the drift compensation amount control signal is input. a sign bit determination circuit that determines the polarity of a sign bit input from a D converter and outputs a sign bit determination signal; and a sign bit determination circuit that inputs the sign bit determination signal, and the sign bit determination signal indicates a positive sign bit. Then, a switch circuit outputs a negative voltage, and a switch circuit outputs a positive voltage if a negative sign bit is indicated, and the output voltage of the switch circuit is integrated, and the integrated voltage is input to the comparator of the A/D converter. It has an integrating circuit that outputs to.

In this way, by performing drift compensation using the result of ANDing the state of the sign bit of the A/D converter and the output of the drift compensation amount control circuit, the amount of compensation can be easily changed by the drift compensation amount control circuit. This eliminates the need for conventional latch circuits and circuits for detecting the digital value O.
The circuit configuration becomes simpler.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a drift compensation circuit for an A/D converter according to the present invention, and FIGS. 2 to 4 are time charts explaining the operation of FIG. 1.

The drift compensation amount control circuit 3 outputs the drift compensation amount control signal j only for a preset period. The sign bit determination circuit 2 determines the polarity of the sign bit e input from the A/D converter 1 during the period when the drift compensation amount control signal j is input, and determines when the sign bit e is "θ". Sign bit determination signal = “1”, fL = “o
”, and when the sign bit e is °°l, it outputs = “0°゛, 2 = “l” as the sign bit judgment signal. The switch circuit 4 inputs 4Q as the sign bit judgment signal. Then, if i indicates a positive sign bit, a negative voltage -■ is output as the sign bit determination signal, and if i indicates a negative sign bit, a positive voltage +V is output.The integrating circuit 5 outputs this output voltage. Integrate Vi and convert the integrated voltage vo to A/
It is output as the input voltage of the comparator input of the D converter 1.

“Next, the operation of this embodiment is as follows:
The case where the voltage drifts toward the A/D converter pressure side will be explained with reference to FIGS. 1 and 2.

Since the A/D converter pressure lift is on the positive side, the output digital value d of the A/D converter 1 becomes a positive value even though the analog input signal a is OV. That is,
The A/D converter pressure sign bit e is °°0''. A/D conversion transducer pressure lift d is 2151.
2+4 1. ... In the case of 21-1, the waveform of the drift shown in two's complement is as shown in FIG. but,
The drift compensation of this embodiment does not use the signal indicating this drift value, but instead uses the sign pitch (e) indicating whether the polarity of the drift is positive or negative and the drift compensation amount control signal j.
This is done by The A/D converter pressure sign via) e and the output j of the drift compensation amount control circuit 3 are ANDed by the sign bit determination circuit 2, and the output of the sign bit determination circuit 2 is determined as the sign bit as shown in FIG. The judgment signal is “1”, fL is “0°”, the output of the sign bit judgment circuit 2 is “loo”, and the switch circuit 4 is turned on when the cross is “°O”. Output voltage Vi
becomes a negative voltage -■ as shown in FIG. The output Vi of this switch circuit 4 is input to an integrating circuit 5 and integrated, and its output v0 becomes as shown in FIG.

The comparator (built-in) input of the A/D converter 1 receives this negative voltage VO output from the integrating circuit 5 and becomes a negative voltage, which becomes the output of the A/D converter 1 during the primary A/D conversion. approaches the digital value O. Similarly, when the drift becomes negative, the output of the A/D converter 1 approaches the digital value O.

3 and 4 are time charts showing the relationship between the time of the drift compensation amount control signal j output from the drift compensation amount control circuit 3 and the actual drift compensation amount.

When the time of the drift compensation amount control circuit j is T1.

The drift after drift compensation is -DI- ~ D1+ (
(Fig. 3), the time of the drift compensation amount control signal j is T2 (<
TI) (FIG. 4), the drift after drift compensation becomes -D2- to D2+ (FIG. 4), and it can be seen that the shorter this time, the smaller the drift after compensation. As shown in FIG. 3, the integrating operation of the integrating circuit 5 is performed using a compensation amount (C+D+-) (=Vo
) compensation is performed and the drift after drift compensation is −
After each negative drift D, -, the compensated drift becomes a positive drift 01. and the negative drift D1-, and this is repeated until it stabilizes. The same applies to FIG.

In this way, when a drift occurs in the A/D converter 1, stable drift compensation can be performed without causing unstable overcompensation.

〔Effect of the invention〕

As explained above, the present invention achieves (1) drift compensation amount control by performing tri-two compensation using the AND result of the state of the sign bit of the A/D converter and the output of the drift compensation amount control circuit; (2) In the case of a successive approximation type A/D converter, A/D conversion is performed from the sine bit, so there is no delay in drift compensation, making drift compensation stable and stable. , the dynamic range of the A/D converter is expanded, the linearity characteristics are improved, and (3) the conventional launch circuit and circuit for detecting digital value 0 are no longer required, making the circuit configuration simpler. It has the effect of making it easier.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the drift compensation circuit of an A/D converter according to the present invention, FIGS. 2 to 4 are time charts explaining the operation of FIG. 1, and FIG. , is a block diagram showing a drift compensation circuit of an conventional A/D converter. 1... A/D converter. 2... Sign focus determination circuit, 3... Drift compensation g1fi1 control circuit, 4... Switch circuit, 5... Integrating circuit, e... Sign bit input from A/D converter 1, j...Drift compensation amount control signal, k, 9. ...sign bee, g judgment signal, Vi...
Output voltage of the switch circuit 4, Vo: voltage outputted from the integrating circuit 5 to the input of the A/D converter and the comparator. Patent applicant: Niki Electric Co., Ltd. 7″-1′ Agent: Susumu Uchihara, patent attorney
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Claims (1)

[Claims] A drift compensation amount control circuit that outputs a drift compensation amount control signal only for a preset period, and a signal input from an A/D converter during the period when the drift compensation amount control signal is input. a sign bit determination circuit that determines the polarity of a bit and outputs a sign bit determination signal;
a switch circuit that outputs a positive voltage if a negative sign bit is indicated; and an integration circuit that integrates the output voltage of the switch circuit and outputs the integrated voltage to the comparator input of the A/D converter. A/D converter drift compensation circuit.