JPS6449324A - Off-set compensating circuit - Google Patents

Off-set compensating circuit

Info

Publication number
JPS6449324A
JPS6449324A JP20503287A JP20503287A JPS6449324A JP S6449324 A JPS6449324 A JP S6449324A JP 20503287 A JP20503287 A JP 20503287A JP 20503287 A JP20503287 A JP 20503287A JP S6449324 A JPS6449324 A JP S6449324A
Authority
JP
Japan
Prior art keywords
integrator
convertor
feedback loop
digital data
set adjustment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20503287A
Other languages
Japanese (ja)
Other versions
JP2552304B2 (en
Inventor
Ichiro Miyake
Masami Tsuchida
Shinichi Wakumura
Yoshimi Iso
Hiroo Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Pioneer Corp
Original Assignee
Hitachi Ltd
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Pioneer Electronic Corp filed Critical Hitachi Ltd
Priority to JP62205032A priority Critical patent/JP2552304B2/en
Priority to US07/234,874 priority patent/US4965867A/en
Publication of JPS6449324A publication Critical patent/JPS6449324A/en
Application granted granted Critical
Publication of JP2552304B2 publication Critical patent/JP2552304B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To simply and exactly execute off-set adjustment by disconnect the feedback loop of an off-set compensating circuit at the time of the off-set adjustment of an A/D convertor. CONSTITUTION:Between a code detecting means 2 and an integrator 3, which form a feedback loop and between which a circuit system exists to execute off-set compensation, a switching means composed of a switch 5 is provided to disconnect the feedback loop at the time of the off-set adjustment of an A/D convertor 1 and to supply digital data different from the digital data obtained by A/D conversion to the integrator 3. At the time of the off-set adjustment of the A/D convertor 1, the switch 5 is changed-over to a contact (b) side, the feedback loop of the circuit system is disconnected and the other digital data are supplied from a terminal 6 to the integrator 3. An off-set correcting voltage is generated from this integrator 3 based on the other digital data to be supplied to the integrator 3 and the off-set adjustment is executed so that the digital code of an output in the A/D convertor 1 can go to be zero.
JP62205032A 1987-08-20 1987-08-20 Offset compensation circuit Expired - Lifetime JP2552304B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62205032A JP2552304B2 (en) 1987-08-20 1987-08-20 Offset compensation circuit
US07/234,874 US4965867A (en) 1987-08-20 1988-08-22 Offset compensation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62205032A JP2552304B2 (en) 1987-08-20 1987-08-20 Offset compensation circuit

Publications (2)

Publication Number Publication Date
JPS6449324A true JPS6449324A (en) 1989-02-23
JP2552304B2 JP2552304B2 (en) 1996-11-13

Family

ID=16500310

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62205032A Expired - Lifetime JP2552304B2 (en) 1987-08-20 1987-08-20 Offset compensation circuit

Country Status (1)

Country Link
JP (1) JP2552304B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03101314A (en) * 1989-09-13 1991-04-26 Eagle Ind Co Ltd Analog/digital converter

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51128254A (en) * 1975-04-30 1976-11-09 Mitsubishi Electric Corp Analog-digital converter
JPS59153490A (en) * 1983-02-16 1984-09-01 Sanyo Electric Co Ltd Electric cleaner
JPS6029025A (en) * 1983-07-14 1985-02-14 Toshiba Corp Offset/drift correcting circuit for analog-digital converter
JPS62104221A (en) * 1985-10-30 1987-05-14 Nec Corp Drift compensation circuit for a/d converter
JPS637024A (en) * 1986-06-27 1988-01-12 Fujitsu Ltd Automatic drift control circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51128254A (en) * 1975-04-30 1976-11-09 Mitsubishi Electric Corp Analog-digital converter
JPS59153490A (en) * 1983-02-16 1984-09-01 Sanyo Electric Co Ltd Electric cleaner
JPS6029025A (en) * 1983-07-14 1985-02-14 Toshiba Corp Offset/drift correcting circuit for analog-digital converter
JPS62104221A (en) * 1985-10-30 1987-05-14 Nec Corp Drift compensation circuit for a/d converter
JPS637024A (en) * 1986-06-27 1988-01-12 Fujitsu Ltd Automatic drift control circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03101314A (en) * 1989-09-13 1991-04-26 Eagle Ind Co Ltd Analog/digital converter

Also Published As

Publication number Publication date
JP2552304B2 (en) 1996-11-13

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