JPS62104069A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To improve current amplification factor and operating speed by simultaneously forming a base region of I<2>L with the collector of a reverse polarity bipolar transistor, thereby forming deeply in low density the base region of I<2>L. CONSTITUTION:A high density N-type buried layer 2 is formed by diffusing antimony in a P-type semiconductor substrate 1, an N-type epitaxial layer 3 is entirely grown, boron is selectively diffused to form a P-type insulating layer 4 to form an element region. Boron is selectively diffused by altering the density to form the collector region 5 of a P-N-P bipolar transistor, the base region 6 of I<2>L, and an injector region 7. Phosphorus is diffused in the region 5 to form a base region 8 of the bipolar transistor, boron is diffused to form an emitter region 9 in the region 8, a collector region 10 is formed on the region 5, and a base contacting region 11 is simultaneously formed in the region 6. Phosphorus is diffused to form collector regions 12a, 12b of I<2>L, while an insulating film 13 is formed to form aluminum electrodes 14 respectively.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor integrated circuit, and particularly to a semiconductor integrated circuit having an I2L (IIL: Integrated Injection Logic) and a bipolar transistor on the same semiconductor substrate. Relating to a manufacturing method.

[Conventional technology]

12L is composed of a unipolar type horizontal transistor (injector transistor) as an injection element, and another polarity type vertical reverse operation transistor (inverter transistor) as a carrier amplification element, and the collector of the horizontal transistor and the vertical transistor Since the base regions of the two are configured in common, there is an advantage that the degree of integration can be greatly improved. Normally, this kind of transistor 12L is formed on the same semiconductor substrate as the bipolar transistor, and using a part of the manufacturing process of the bipolar transistor.
For example, when forming I2 made of an NPN transistor, its base region is formed at the same time as the base region of the NPN bipolar transistor.

However, on I2 formed in this way,
Since the impurity concentration and junction depth of the base region are the same as those of the base region of a bipolar transistor,
The following problems arise due to the relationship with this bipolar transistor.

(1) The reverse operation transistor is usually composed of an NPN transistor, but the current amplification factor (referred to as βU) is the current amplification factor Chr of the bipolar NPN l-transistor.
t), and to increase βup, h
FE must also be increased. However, hyt
By increasing the voltage, the withstand voltage of the NPN transistor is lowered.

(2) High breakdown voltage NPN) In order to coexist with transistors, it is necessary to increase the specific resistance of the epitaxial layer or thicken the epitaxial layer, but the former method reduces the efficiency of electron injection from the epitaxial layer to the base. As a result, βU becomes smaller. Furthermore, in the latter case, the amount of accumulated holes injected into the emitter of the reverse operation transistor of I2L is large, and the operation speed is reduced.

For this reason, conventional attempts have been made to form the base region of I2L independently of the base region of the bipolar transistor.

That is, before forming the base region of a bipolar transistor, impurities are usually diffused at a low concentration and deep.
This is a method in which a 2L base region is formed in advance. According to this method, since the base region is formed with a low concentration and reaches the buried high concentration region, the injection efficiency of electrons is increased and their recombination is suppressed. , βU becomes high. Furthermore, since the amount of accumulated holes injected into the emitter region is small, the operating speed is also increased.

[Problem that the invention seeks to solve]

In the conventional manufacturing method described above, in addition to the already complicated semiconductor integrated circuit manufacturing process, a mask process, impurity implantation and diffusion process for independently forming the base region of I2L are newly added. It cannot be denied that this greatly increases the manufacturing process and makes manufacturing difficult. Furthermore, the increase in the number of manufacturing steps leads to the problem of higher costs for semiconductor integrated circuits.

[Means for solving problems]

The method of manufacturing a semiconductor integrated circuit of the present invention aims to improve the β of I2L and the operation speed by forming the base region of I2L with low concentration and deep without increasing the manufacturing process, and to improve the β of I2L and the operation speed. In a semiconductor integrated circuit having both on the same semiconductor substrate, the base region of I2L is formed at the same time as the collector region of the bipolar transistor having the opposite polarity.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

1 to 4 are cross-sectional views showing the method of the present invention in the order of manufacturing steps.

First, as shown in Fig. 1, an impurity concentration of 1 x 101 is applied to a P-type semiconducting substrate 1 having a 1 to 3 Ω mark by antimony diffusion.
An N-type buried layer 2 with a high concentration of about 9 cm-'' is formed, and an N-type epitaxial layer 3 with a thickness of 1 to 10 Ωcm is formed on the layer 2 with a thickness of 10 μm.
The film is grown over the entire surface to a thickness of about 1.5 m.

Next, as shown in FIG. 2, boron is selectively diffused into the epitaxial layer 3 to form a P-type insulating layer 4 to define an element region. Then, boron is selectively diffused into this device region with varying concentrations to form regions 5 and 6°7, each having a depth of about 1 pm and a thickness of about 1×IQ 15 cm −′. Here, region 5 becomes the collector region of the PNP bipolar transistor, and regions 6 and 7 become the base region and injector region of I2L, respectively.

Next, as shown in FIG. 3, phosphorus is diffused into the region 5 to form a base region 8 of a PNP bipolar transistor with a depth of about 4 μm and a thickness of about 1×10”Cm−’.
An emitter region 9 is formed in the base region 8 by diffusing boron thereon, and a collector contact region 10 is formed in the collector region 5. At the same time, a base contact region 11 is provided in the 12L base region 6.
form. These emitter regions9. The concentration of collector contact M region 10 and base contact region 11 is I
The depth is about 2 μm with a width of about 10”cm.

Thereafter, as shown in FIG. 4, phosphorus is diffused to form collector regions 12a and 12b on I2 with a thickness of approximately 1XlO19Cm-'' to a depth of approximately 1 μm.Then, an insulating film 13 is formed on the entire surface, and contact holes are formed. After opening, each aluminum electrode 14 is formed to complete the process.Thereby, as shown in the figure, an NPN configuration I2L and a PNP bipolar transistor can be formed at the same time.

Although not shown, an NPN bipolar transistor is usually formed at the same time using some of these steps.

Since the area on I2 formed in this way is formed at the same time as the collector region 5 of the PNP bipolar transistor,
The base region 6 is formed at a low concentration and deeply until it reaches the buried layer 2. Therefore, the base width of the vertical transistor can be increased, and the h
High β without being affected by rt. can be obtained, and the operation speed can also be increased. Further, the breakdown voltage of the NPN bipolar transistor can also be improved.

On the other hand, in this manufacturing method, the base region 6 of I2L is made of PNP.
Since it can be formed at the same time as the collector region 5 of the bipolar transistor, there is no need to newly add an independent process, and manufacturing can be performed using conventional processes as is. Therefore, there is no need to increase the number of steps (it can be easily formed and manufactured at low cost).

Note that when forming an NPN bipolar transistor (not shown), the collector regions 12a and 12b of I2L may be formed simultaneously with the formation of its emitter region, and the number of steps is not increased in this step.

〔Effect of the invention〕

As explained above, in the manufacturing method of the present invention, the base region on I2 is formed at the same time as the collector region of the bipolar transistor with the opposite polarity, so the base region on I2L is formed with a low concentration and a large base width. High β
□ can be obtained and the operating speed can be improved. Moreover, since a part of the conventional manufacturing process is used as is, the number of steps is not increased, and manufacturing can be performed easily and at low cost.

[Brief explanation of drawings]

1 to 4 are cross-sectional views for explaining the method of the present invention in the order of steps. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Buried layer, 3... Epitaxial layer, 4... Insulating layer, 5... Collector region,
6...Base area, 7...Injector area, 8.
...Base region, a...Emitter region, 10...Collector contact region, 11...Base contact region, 12a, 12b...Collector region, 13...Insulating film, 14...Aluminum electrode .

Claims (1)

[Claims] 1. In a method for manufacturing a semiconductor integrated circuit in which an I^2L and a bipolar transistor are formed on the same semiconductor substrate, the base region of the I^2L is the collector region of a bipolar transistor having the opposite polarity. A method for manufacturing a semiconductor integrated circuit, characterized in that the semiconductor integrated circuits are formed simultaneously. 2. I^2L P composed of NPN transistors
2. A method of manufacturing a semiconductor integrated circuit according to claim 1, wherein a type base region is formed at the same time as a P type collector region of a PNP bipolar transistor.