JPS62104029A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To readily obtain a semiconductor device having preferable contacting resistance characteristic and sheet resistance characteristic by specifying injecting condition of BE2<+> and the size of a contacting hole. CONSTITUTION:BE2<+> ions 2 are implanted to a predetermined region of a silicon semiconductor substrate 1 under the conditions of 43kV or higher of accelerating voltage and 3X10<-2> or higher of dosage to form a P-type diffused region 3, and step of foring a contacting hole of 1.5mum square or less communicating with the P-type diffused region is provided. Thus, a semiconductor device which has preferable contacting resistance characteristic and sheet resistance characteristic can be readily obtained.

Description

[Detailed description of the invention] [Technical field of invention] The present invention relates to a method for manufacturing a semiconductor device.

[Technical background of the invention]

Conventionally, BF2 is ion-implanted into a silicon semiconductor substrate in order to form the source/drain of a P-channel MO8 element constituting a semiconductor device, to form a P-type polysilicon wiring, and the like.

This F2 ion implantation technique has the following advantages.

■ Shallow junctions can be easily formed.

■ By setting the range short during ion implantation, it is possible to avoid penetration directly below the r-t.

The diffusion depth (X,) of the diffusion region formed by ion implantation is set using uniquely equivalent converted acceleration energy information, and the sheet resistance (ρ,) is set as follows.
Primarily, this has been done by controlling the magnitude of the dose.

That is, this technique utilizes the B+ ion implantation technique as is.

[Problems with background technology]

Therefore, the conventional method of manufacturing a semiconductor device using the BF2+ ion implantation technique has the following problems.

■　The size of the minimum conductive contact hole increases rapidly.

Such a phenomenon is not observed during As+B implantation.

(2) The sheet resistance (ρ, ) of the P+ region formed by ion implantation of BF2+ increases rapidly during oxidation.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that can easily produce a semiconductor device having good contact resistance characteristics and sheet resistance characteristics.

[Summary of the invention]

The present invention provides an acceleration voltage of 4
3 keV or more, dose 3 x 10” crrt-
By providing a step of implanting BF2 ions under two or more conditions to form a P-type diffusion region, and forming a contact hole of 1.5 μm or less in size leading to this P-type diffusion region,
The present invention is a method for manufacturing a semiconductor device that can easily obtain a semiconductor device having good contact resistance characteristics and sheet resistance characteristics.

[Embodiments of the Invention] Hereinafter, embodiments of the present invention will be described with reference to the drawings. As shown in FIG. 1, BF2+ ions 2 are implanted into a predetermined region of an N-type silicon semiconductor substrate 1 with a plane orientation of (100) at an acceleration voltage of 50.V and a dose of 1×10 cIrL. 3 was formed. Then add 9 to this
Heat treatment was performed for 30 minutes at a temperature of oo°C. Sheet resistance (ρS) of the P-type diffusion region 3 of sample A obtained in this way
When measured, it was 55Ω/mouth. Also, this P
Assuming contact holes leading to the type diffusion region 3, the resistance value (Re
) to determine the minimum contact hole dimensions.
The opening was 1.0 μm.

To compare with this, the acceleration voltage of BF2+ ions was set to 35
Sample B in which a P-type diffusion region was formed in a predetermined region of an N-type silicon semiconductor substrate was obtained in the same manner as in the example except that the temperature was set to keV.

In addition, the dose of BF2+ ions is I x 10'
Under the same conditions as sample B except that cyn-2 was used, N
A sample C was obtained in which a P-type diffusion region was formed in a predetermined region of a type silicon semiconductor substrate.

Similarly to sample A in the example, for sample B1 and sample C, the sheet resistance (ρ, ) of the P-type diffusion region and the size of the minimum contact hole were investigated. In the case of sample B, the sheet resistance (ρ, ) is 1
The resistance was 40Ω/mouth, but it suddenly increased to 320Ω/mouth during oxidation. Also, the minimum contact hole size is 1.8
It was μm mouth. For sample C, the sheet resistance (ρ, ) is 250Ω/hole, and the minimum contact hole size is 2.6
It was a large value of μm.

As is clear from the results of samples A, B, and C, good contact resistance characteristics and sheet resistance characteristics can be obtained with the method of the present invention (sample (A)).

Why can such an effect be obtained, when the defect distribution area that obstructs the current flow and the current actually flows? The explanation will be based on the analysis results obtained by separately controlling the Ron distribution region.

FIG. 2 is an explanatory diagram showing the trajectory of BF2 particles by a high-precision simulator developed by the present inventors. As shown in the figure, the BF2 molecular particles move in unison within the silicon semiconductor substrate while colliding with each other. When the BF2 molecular particle obtains a certain scattering angle (B0), this molecular particle decomposes into three constituent particles, and the subsequent trajectory behavior is such that all three particles fly independently. For energy distribution, the energy immediately before decomposition and dissociation was proportionally distributed using mass number.

This is because the simulator can obtain the impurity distribution and defect distribution with sufficiently high accuracy.

The impurity distribution and residual storage energy distribution of 9BF2 ion implantation determined using a simulator are shown in FIGS. 3 and 4. FIG. 3(A) shows BF within the range outside the conditions of the present invention.
The final resting position of B+ was determined using the acceleration voltage during the second injection as a parameter. Figure 3 (B) (('l is
The final resting position of B+ was determined using the acceleration voltage at the time of BF2 injection as a parameter within the range of the conditions of the present invention.

FIG. 4 shows the residual stored energy imparted into the silicon semiconductor substrate during each BF2 implant. In the case of 30 keV, which is outside the conditions of the present invention, the distribution of residual energy has a peak at the surface layer of the silicon semiconductor substrate, that is, below 30X, but at 50 keV, which is outside the conditions of the present invention,
eV and 70 keV, it is slightly deeper at 150~2
It was found that there was a peak near 50X. It can be seen that the dependence of this peak position on the accelerating voltage is different from the distribution of B+ shown in Figure 3 (station).
The distribution of residual stored energy moves deeper as the accelerating voltage increases, but this movement is smaller than the distribution of B. Therefore, when the accelerating voltage is large, the peak of B+ and the peak of residual stored energy are fleetingly large. To separate.

Based on the above results, we will explain the actual measured values of contact resistance (R) and sheet resistance (ρ).The table below shows that the accelerating voltage of BF2+ ions is 35 keV and 50 ks.
In the case of V, the minimum conductive contact dimensions are shown for N2 annealing treatment and DryO2 treatment.

Table (insert y-il) From the same table, it can be seen that the minimum conductive contact dimension is kana 9 smaller in the case of 50 keV. This means that the higher the accelerating voltage, the more the residual accumulated energy (defect distribution) becomes relatively s.
Since it is located deep from the 17ht interface, there are fewer abnormally precipitated nuclei of 81, indicating that the minimum conductive contact dimension is small.

Further, FIG. 5 shows the evaluation results of the sheet resistance (ρ, ). Here again, it can be seen that the sheet resistance is slightly lower when the accelerating voltage is higher, and is relatively stable in both N2 annealing and Dry 02.

This is also due to the relationship between the peak position of the defect distribution and the peak position of B. The reason for the instability when the accelerating voltage is low is considered to be that the defect peak position and the B+ peak position are close to each other, and that they are present in the surface layer. That is, carriers are scattered, and B is lost during oxidation, resulting in sheet resistance (
It was found that ρ8) becomes unstable.

〔Effect of the invention〕

As explained above, according to the method for manufacturing a semiconductor device according to the present invention, a semiconductor device having good contact resistance characteristics and sheet resistance characteristics can be easily obtained.

[Brief explanation of drawings]

Fig. 1 is a sectional view of the main part of an embodiment of the present invention, Fig. 2 is an explanatory diagram showing the trajectory of BF2 particles, and Fig. 3 is a 9B+ FIG. 4 is an explanatory diagram showing the final resting position, FIG. 4 is an explanatory diagram showing the residual stored energy given in the silicon semiconductor substrate at the time of each BF2 implantation, and FIG. 5 is an explanatory diagram showing the evaluation results of sheet resistance. DESCRIPTION OF SYMBOLS 1... Silicon semiconductor substrate, 2... BFz+ ion, 3... P-type diffusion region. Applicant's agent Patent attorney Takehiko Suzue Figure 1 I' Figure 2 r t＼-yo mostly 4

Claims (1)

[Claims] An accelerating voltage of 43 keV or more and a dose of 3 x 10^1^5 cm^-^ are applied to a predetermined region of a silicon semiconductor substrate.
A step of implanting BF_2^+ ions under conditions of 2 or more to form a P-type diffusion region, and a step of forming a P-type diffusion region of 1.5
1. A method of manufacturing a semiconductor device, comprising the step of forming a contact hole with a diameter of μm or less.