JPS6321355B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device having a constant voltage diode whose Zener breakdown voltage changes little over time.

Conventionally, as a method for forming a constant voltage diode in a semiconductor integrated circuit, for example, as shown in FIG.
After growing an N-type epitaxial layer 2 on a type semiconductor substrate 1 and providing a P-type insulating separation layer 3 by a selective diffusion method, P-type and N-type impurity layers are sequentially diffused into the epitaxial layer 2 to form a transistor. A base region 5 and an emitter region 6 of the structure are respectively formed. A junction formed by the contact between the base region 5 and the emitter region 6 (hereinafter referred to as an emitter junction)
A constant voltage diode is constructed.

On the other hand, the constant voltage diode with this configuration was tested as an accelerated test to investigate the change in breakdown voltage over time.
A test in which a reverse breakdown current is passed for a predetermined time (e.g. 3mA for 30 minutes) in a high temperature atmosphere (e.g. 125℃) and then left in a high temperature atmosphere (e.g. 150℃) (hereinafter referred to as H・T・O・R test) ), the breakdown voltage of the voltage regulator diode is the H・T・O・
It was confirmed that the instability significantly changed before and after the R test. It has also been determined that the instability is increased by molding with certain resins. For example, as a method for forming the base region, boron is deposited as a P-type impurity at 980°C by selective diffusion, and then at 1050°C for 50 minutes.
When diffused in a water vapor atmosphere, for example, in a 6.8V constant voltage diode, the above H・T・O・R test shows a change in breakdown voltage of about 50 to 200 mV before molding and about 200 to 500 mV after molding. occured. Furthermore, the above-mentioned H・T・
Approximately 20 to 100 mV before the mold according to O/R test.
After molding, the breakdown voltage changed by about 50 to 300 mV.

Another conventional method for forming a constant voltage diode is to form a region of the second conductivity type from the surface of the semiconductor substrate of the first conductivity type in order to form a PN junction between the semiconductor substrate and the semiconductor substrate. By implanting impurity ions of the first conductivity type into a predetermined surface of the second conductivity type region, and providing a region having an impurity concentration different from the impurity concentration of the semiconductor substrate in contact with the PN junction at the bottom of the second conductivity type region. , a technique has been proposed that allows the value of breakdown voltage to be adjusted to an arbitrary value. (Japanese Patent Application Laid-Open No. 1983-36777 and
(Refer to Publication No. 74171) However, in such conventional technology,
Since the ion implantation method is used, the impurity distribution in the impurity concentration region can be controlled accurately, but the diffusion method is used to form the second conductivity type region, and the diffusion depth from the semiconductor substrate surface is When variations occur at the bottom, this eventually leads to variations in the impurity concentration at the PN junction. That is,
When ions are implanted, impurity ions are thought to have a Gaussian distribution in the depth direction centered on the average penetration depth R _P of the ions according to the ion acceleration voltage, and as mentioned above, If the diffusion depth at the bottom varies, the impurity concentration in the impurity concentration region where the PN junction exists at the bottom of that region will vary.

Here, the breakdown voltage of the constant voltage diode is PN
There is a predetermined relationship with the impurity concentration of each of the P-type region and the N-type region in the junction, and if there is a difference in the impurity concentration, the impurity concentration of the conductivity type region with the lower concentration mainly depends on the impurity concentration. to be influenced. and,
According to the configuration of the prior art described above, in order to take out the electrode from the surface of the semiconductor substrate, the impurity concentration in the second conductivity type region needs to be one order of magnitude higher than the concentration in the impurity concentration region, and therefore the breakdown voltage is mostly affected by the impurity concentration in the impurity concentration region, and the concentration varies for the reasons mentioned above, so variations in breakdown voltage have also occurred in this prior art.

Therefore, the present invention has been made in view of the above-mentioned drawbacks, and eliminates the instability in the above-mentioned H・T・O・R test, and improves the temporal change of the Zener breakdown voltage.
Another object of the present invention is to provide a method for manufacturing a semiconductor device having a constant voltage diode, which can reduce variations thereof.

As a result of investigating the cause of breakdown voltage instability through the above-mentioned H.T.O.R. test, the present invention found that the region where the breakdown phenomenon occurs in the constant voltage diode (hereinafter referred to as the Zener breakdown region) is located on the semiconductor substrate. Focusing on the fact that the above-mentioned instability increases as the distance approaches the surface, and the fact that Zener breakdown in the PN junction occurs at the maximum concentration part of the low concentration region that constitutes the PN junction, we and the first conductivity type second
After forming a PN junction with the second conductivity type first
An impurity capable of forming the same conductivity type as the first region of the second conductivity type is ion-implanted into the region at a predetermined ion acceleration voltage, and at least
The above objective is achieved by forming the maximum impurity concentration portion of the first region of the second conductivity type to a depth of 0.2μ or more and in contact with the side surface of the second region of the first conductivity type. be.

The present invention will be specifically described below with reference to embodiments shown in the drawings.

Embodiment 1 FIGS. 1 to 3 are diagrams for explaining the manufacturing method of the present invention, and are an example of a case where a plurality of integrated circuit elements such as transistors (not shown) are also formed at the same time. First, as shown in FIG. 1, an N-type epitaxial layer 2 is grown on a P-type silicon semiconductor substrate 1.
After providing the P-type insulating isolation layer 3 by selective diffusion as in the conventional method, P-type and N-type impurities having the impurity concentration required for the integrated circuit element are sequentially diffused into the epitaxial layer 2. , a base region 5 and an emitter region 6 of a transistor structure are respectively formed. The base region 5 and emitter region 6 correspond to cathode and anode regions, respectively, when used as a constant voltage diode. Next, in the substrate 1 on which the base region 5 and emitter region 6 are formed, the oxide film 4 on the substrate surface in the region to be used as a constant voltage diode is removed as shown in FIG. After removing the area including the PN junction) je but not reaching the collector junction JC using photoetching technology, a P-type impurity of the same conductivity type as the base region 5, such as boron, is ion-implanted at a predetermined acceleration voltage, and then, for example, A surface protective film 8 is formed by chemical vapor deposition, and annealed in a nitrogen atmosphere at, for example, 1000° C. for 10 minutes. Thereafter, a semiconductor integrated circuit is formed through an electrode forming process as in the conventional method.

The impurity ions implanted as above are
In the depth direction, it is thought that there is a Gaussian distribution centered on the average penetration depth Rp of ions (referred to as projected range) depending on the ion accelerating voltage. Figure 4 shows the relationship between the projected range Rp and the ion acceleration voltage E. In Figure 4, characteristic a shows the relationship between acceleration voltage E and breakdown voltage change △Vz, and characteristic b shows the relationship between acceleration voltage E and projected The relationship between range Rp is shown. In other words, the breakdown voltage of the emitter junction formed by the above formation method is generally influenced by the impurity concentration in the lower concentration region of the regions that make up the emitter junction, as described above. Compared to this, the impurity concentration in the base region 5 is more than one order of magnitude lower, so that it is almost determined by the maximum concentration of P ⁺ concentration in the base region 5 formed by ion implantation, and Zener breakdown occurs. It is understood that the depth is almost determined by the depth from the substrate surface corresponding to the maximum concentration (equal to the projected range Rp). FIG. 5 shows the concentration distribution of the base region 5 in the depth direction from the silicon substrate surface 7 using the above-mentioned formation method. From this figure, it can be seen that the maximum concentration of the ion implantation amount corresponds to the base region 5. If the value is approximately equal to or higher than the underlying P ⁺ concentration, the total impurity concentration distribution in the base region 5 will have the characteristic e shown in FIG.
It is understood that it has a maximum value at the projected range Rp, which is approximately determined by the acceleration voltage of the implanted ions.
This makes it possible to control the region where the breakdown phenomenon of the emitter junction occurs after ion implantation by the acceleration voltage of the implanted ions. H after molding the constant voltage diode formed by the above method.
Characteristic a in FIG. 4 shows the change in breakdown voltage ΔVz due to the T.O.R test using the acceleration voltage E as a parameter. As is clear from this figure, the higher the accelerating voltage E, the smaller △Vz becomes.
It can be seen that a constant voltage diode with little change over time can be formed.

In the first embodiment shown in FIGS. 1 to 5, when forming the base regions of other transistors, the underlying base region 5 of this constant voltage diode is also formed at the same time, so the impurity concentration of this base region 5 is The value of is limited by a preset value and cannot be made too low. Despite this limitation, in Example 1, as shown in FIG.
100Kev) or more, the breakdown voltage change△
It was recognized that Vz could be made very small.

Note that the characteristic c in FIG. 5 shows the underlying P ⁺ concentration distribution corresponding to the base region 5, and since this base region 5 is formed by diffusion of impurities, there is a slight difference with respect to the depth l from the substrate surface. In addition, near the substrate surface, the concentration is slightly lower due to the effect of sucking out impurities in the oxide film forming process and the influence of impurity ions on the substrate surface. Further, the characteristic d shows the P ⁺ concentration distribution of an impurity (boron) ion-implanted from the outside. From this figure, the characteristic e of the P ⁺ concentration distribution in the base region 5 after ion implantation is the sum of the concentration of the underlying P ⁺ concentration distribution c and the concentration of the ion-implanted impurity concentration distribution d, and therefore, the impurity The sharper the concentration distribution d, or the lower the concentration of the underlying P ⁺ concentration distribution c, the sharper the maximum concentration part in the concentration distribution e becomes. It was confirmed that stable device characteristics could be obtained even at a shallow position.

This is also clear from FIGS. 6 and 7. First of all, Figure 6 shows the concentration of P ⁺ concentration distribution c in the base when a constant ion accelerating voltage (E = 150 Kev in this example) and a constant ion implantation amount (1.58 x 10 ¹⁴ cm ^-3 in this example) are used. The results of an experiment showing the relationship between the breakdown voltage and the change △Vz are shown in ^{FIG .} This is an experimental result showing the relationship between the maximum concentration in the ion implantation region and △Vz in case ³ ). As can be seen from both figures, even when the ion accelerating voltage is constant, ΔVz becomes smaller as the base concentration is lower, and ΔVz becomes smaller as the concentration of the maximum concentration portion becomes higher.

In view of the experimental results shown in Figures 4 to 7 above, in order to minimize the change in breakdown voltage △Vz of the voltage regulator diode in the H・T・O・R test (within 100 mV, for example), ion implantation is necessary. The ion implantation concentration and the base concentration are set so that the maximum concentration part of the ion implantation area is at least higher than the original base concentration and has a sharp shape, and the maximum concentration part is at least 0.2 to 0.3μ higher than the substrate surface. It can be seen that the ion accelerating voltage (approximately 60 Kev or more) should be set so that the ion is formed at a depth greater than or equal to .

In Example 1 above, as explained using FIG. 2, after removing the oxide film 4 over a range including the emitter junction je but not reaching the collector junction JC, By implanting ions at a predetermined acceleration voltage, the maximum concentration portion of the base region 5 is formed. In this case, the maximum concentration portion is formed on the side surface 6a of the emitter region 6.
It is formed in contact with the PN junction to a depth that corresponds to the magnitude of the accelerating voltage.

In Example 1, the emitter region 6 of the transistor structure is formed, and its diffusion depth is usually 2μ.
Because of this, the maximum concentration portion is not formed at the bottom of the emitter region 6, but is inevitably formed at the side surface 6a thereof.

Now, when the maximum concentration portion is formed on the side surface 6a of the emitter region 6 in this way, the implanted impurity ions are thought to have a Gaussian distribution centered on the projected range Rp in the depth direction, as described above. In the horizontal direction perpendicular to the depth direction, the impurity distribution is approximately uniform across the ion implantation region, so for example, there may be variations in the diffusion depth or width in the horizontal direction of the emitter region 6 formed by the diffusion method. Even if this occurs, there will be no variation in the impurity concentration at the maximum impurity concentration portion in the emitter junction, so variation in breakdown voltage can be reduced.

Next, based on the considerations described in Example 1 above, the underlying base region is formed in a separate process from the base regions of other transistors, and the impurity concentration in the ion-implanted layer is made as low as possible. Embodiment 2 A method of making the maximum concentration part in the concentration distribution more sharp and further increasing the effect of ion implantation will be described below as a second embodiment.

As shown in FIGS. 8 and 9, after forming up to the P-type insulating isolation layer 3 in the same manner as in Example 1, the oxide film is removed from the region where the constant voltage diode is to be formed by photoetching, and then by, for example, ion implantation. P
By implanting and thermally diffusing boron as a type impurity, a P ^- region 9 having a sufficiently lower impurity concentration than the impurity concentration in the base region when forming other transistors is formed. Thereafter, the base region 5 and emitter region 6 of the transistor structure as shown in Example 1 are formed by the same method as in Example 1, and Example 1 is formed in the constant voltage diode formation region.
In the same manner as above, a P-type impurity such as boron is implanted,
After forming the surface protective film, annealing treatment and electrode formation are performed.

In a constant voltage diode formed by such a manufacturing method, for example, as the present experimental conditions, the impurity concentration in the P ^- region corresponding to the base concentration distribution ^f in ^FIG . ×
In the sample with a concentration of 10 ¹⁹ cm ^-3 , as shown in Figure 10, the impurity concentration distribution g in the P ^- region after ion implantation is not affected at all by the underlying concentration in the P ^- region.
Projected range determined by accelerating voltage during ion implantation
Gaussian distribution centered on Rp. In Example 1, the base region at the time of transistor formation was used as the base concentration of the P ⁺ region, so ions were implanted to obtain the same maximum concentration as in Example 2 for the base concentration of approximately 6×10 ¹⁸ cm ^-3 . The maximum concentration is reached at an amount of 6×10 ¹⁸ cm ^-3 , and the spread becomes larger due to the influence of the P ⁺ base concentration after implantation. Assuming that the region where the breakdown phenomenon occurs has a certain spread around the maximum concentration point of the P ⁺ region, the effective yield region (the region in Fig. 10) in Example 2 is different from that in Example 1. h) is deeper than the silicon substrate surface 7, ΔVz can be made smaller even if the same acceleration voltage is used. FIG. 11 shows the relationship between △Vz and accelerating voltage as an experimental result based on Example 2.
65Kev) or more, it can be seen that △Vz hardly occurs. In addition, also in this Example 2,
As in the first embodiment, the maximum concentration portion of the P ^- region 9 is in contact with the PN junction formed on the side surface of the emitter region 6.

Note that although the above embodiments have described semiconductor integrated circuit devices including NPN transistors,
It goes without saying that the present invention can be similarly implemented with transistors having completely opposite polarity. Moreover, it can be widely implemented as long as it is a planar type constant voltage diode.

As described above, according to the method of manufacturing a semiconductor device according to the present invention, after forming a PN junction, at least
An impurity capable of forming the same conductivity type as the first region of the second conductivity type is ion-implanted into the first region of the second conductivity type constituting the PN junction at a predetermined ion accelerating voltage. Since the maximum impurity concentration portion of the first region of the second conductivity type is formed at a depth of 0.2μ or more and in contact with the side surface of the second region of the first conductivity type, H.T.O. - To obtain a semiconductor device having a highly reliable constant voltage diode with stable characteristics that eliminates instability caused by the R test, causes almost no change in Zener breakdown voltage over time, and reduces variations in the breakdown voltage value. It has the effect of being able to

[Brief explanation of the drawing]

1 to 3 are cross-sectional views of a semiconductor device during each manufacturing process showing Embodiment 1 of the semiconductor device manufacturing method of the present invention, and FIG. 4 shows the projected range and constant voltage diode with respect to the boron ion implantation accelerating voltage. FIG. 5 is a characteristic curve showing the change in breakdown voltage of Example 1.
Characteristic diagrams showing the P ⁺ impurity concentration distribution from the silicon substrate surface in Figures 6 and 7, respectively.
Characteristic diagrams showing the relationship between the P ⁺ base concentration and △Vz, and the relationship between the maximum base concentration and ΔVz. Figures 8 and 9 are cross-sectional views of the semiconductor device in Example 2, and Figure 10 is Example 2. FIG. 11 is a characteristic curve showing the change in breakdown voltage with respect to the ion implantation acceleration voltage. DESCRIPTION OF SYMBOLS 1...P-type semiconductor substrate, 2...N-type epitaxial layer corresponding to a semiconductor base portion, 3...P-type insulating separation layer, 4...oxide film, 5...base region forming a second conductivity type doped layer, 6...th an emitter region forming a first conductivity type doped layer; 9... a P ^- layer forming a second conductivity type doped layer;
je...emitter junction, jc...collector junction.

Claims (1)

[Claims] 1 A first region of a second conductivity type formed partially from the surface of the semiconductor substrate of the first conductivity type, and a second region of the first conductivity type having a higher impurity concentration than the first region of the second conductivity type from the surface of the semiconductor substrate. The second conductivity type first region is formed so that the second conductivity type first region and the first conductivity type second region overlap at least partially, and the second conductivity type first region is formed in the second conductivity type first region near the PN junction portion where the second conductivity type first region and the first conductivity type second region overlap. An impurity capable of forming the same conductivity type as the first region of the mold is ion-implanted at a predetermined ion acceleration voltage to form a second region of the first conductivity type at a depth of at least 0.2 μm from the surface of the semiconductor substrate. A method of manufacturing a semiconductor device, characterized in that a maximum impurity concentration portion of the first region of the second conductivity type is formed so as to be in contact with a side surface.