JPS60195928A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain uniformity of implanted amount by forming a thin oxide film on a semiconductor substrate before implanting ions, implanting the ion in high density of the specific level or higher through the film, and preventing the substrate from charging up thereby suppressing dispersion of the ion beam. CONSTITUTION:A field oxide film 11, a gate oxide film 12, and a polysilicon gate electrode 13 are formed by a normal procsss. The electrode 13 is doped with phosphorus in high density for the purpose of decreasing an electric resistance of the electrode. After the film 12 onthe source and drain region of a semiconductor substrate is removed by etching, a thin oxide film is formed by thermal oxidizing. This is called an implanted oxide film 14. Arsenic or phosphorus ions are implanted in high density (10<14>/cm<2> level or higher) to the semiconductor substrate to become a source and drain region through the film 14. The thickness of the film 14 is reduced as compared with the projecting fly of an impurity to be ion implanted. After implanting ions in high density, the film 14 is removed and annealed. Then, a source 15 and a drain 16 are formed. Thereafter, the normal process is used.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to ion implantation used in manufacturing semiconductor devices such as MOS FETs. This provides a manufacturing method particularly suitable for high-concentration ion implantation.

(Technical background) ``Ion implantation is widely used in the manufacture of semiconductor devices. Particularly in recent years, the ratio of high-concentration ion implantation in which ions are implanted with a large ion beam current of 1 mA or more has been increasing. One of the problems with high-concentration ion implantation with a dose of 10"/ciq" or more is the temperature rise of the wafer, which is the implanted object.In order to perform high-concentration ion implantation with a resist mask, the wafer temperature must be lower than 150°C. It is necessary to suppress it. FIG. 1 shows a disk on which a wafer, which is an object to be implanted with ions, is placed. In order to solve this problem in a high-concentration ion implanter, the disk 1 on which the implanted object is placed is first cooled with water, and then the wafer 3 is placed through a cooling sheet 2 with good thermal conductivity.
A method of cooling is generally adopted.

The cooling sheet 2 is made of a material such as rubber, and has good thermal conductivity but poor electrical conductivity, so that electrons for neutralizing the implanted ions can only be supplied from the metal wafer clamp 4. As a result, the wafer is easily charged up, and if the wafer clamp 4 is coated with Teflon or the like to prevent dust, this is even more likely to occur. By the way, if the cooling sheet is made of metal, it will not adhere well to the wafer and will not have a good cooling effect.

Another problem faced by high-concentration ion implanters is the dependence of the measured ion beam current on the implantation vacuum degree. Figure 2 [
, ) is an anno 4-char 5. that focuses an ion beam using a conventionally used ion beam single flow measurement circuit. Fundy receiving ion beam current 6. Bias electrode? ,
It consists of a bias power supply 8 and an ammeter 9. The bias electrode 7 and the bias power supply 8 function to prevent the secondary electron current generated by the ions implanted into the Faraday 6 from being superimposed on the ion beam current.

FIG. 2 [b] shows the relationship between the ion beam current ratio (measurement current/beam current) and the implantation vacuum degree in the circuit of FIG. 2 [a]. It can be seen that the worse the implantation vacuum, the lower the ion beam current ratio. This shows that if the injection vacuum level is poor, the injection setting will be too high and too much will be injected. Figure 3 [a'
3 is an ion beam current measurement circuit that improves this point and has an aperture 5. Faraday 6. It consists of an ammeter 9 and a magnetic pole 10 for confining secondary electrons within a magnetic field. FIG. 3 [b] shows the relationship between the ion beam current ratio and the implantation vacuum degree in the circuit shown in FIG. 3 [, 'll. It can be seen that with this method, the ion beam current ratio is almost constant and is not easily dependent on the implantation vacuum degree. The secondary electron suppression method shown in FIG. 2 is called an electrostatic suppression method, and the secondary electron suppression method shown in FIG. 3 is called a magnetic suppression method. Some high-concentration ion implantation devices use both an electrostatic suppression method and a magnetic suppression method. Although the magnetic suppression method has the effect of removing the vacuum dependence of the measured ion beam current,
Since secondary electrons are almost completely captured, there is also the drawback that divergence occurs due to the repulsion of the ion beam's charges.

In high-concentration ion implantation equipment with a dose of 11014/cIIL2 or higher, the beam system for ion implantation is usually 1 (1
It is about mφ. Therefore, high concentration ion implantation results in a high charge density in the beam.

In a high-concentration ion implantation system that has a wafer cooling mechanism using a cooling sheet and an ion beam current measurement circuit using a magnetic suppression method, in addition to the aforementioned problems of wafer charge-up and ion beam divergence, ions in the ion beam are charged. There is a problem in that the ion beam further diverges due to electrical repulsion from the raised wafer. In this case, the ion beam divergence is proportional to the amount of charge-up in the wafer, so if the amount of charge-up in the wafer is uneven, ions will not be implanted uniformly. Figure 4 shows an example of this phenomenon, when 40 k of phosphorus is added to P-type (100) silicon
eV, dose JIt1 x 1016 cIn-2 ions are implanted, and a retention film such as CVD5I is applied to prevent phosphorus from diffusing to the outside.
After forming 02 film 500X, 100X film was formed in nitrogen atmosphere.
This is the sheet resistance distribution after annealing in an electric furnace at 0° C. for 30 minutes. In Figure 4, the width of one line is 2.5
Shows %. The average value of the sheet resistance is shown by the thick line and is 9. The sheet resistance is distributed within a range of ±12% from the average, and the sheet resistance is higher in the middle of the sheet. Implantation uniformity (sheet resistance standard deviation/average sheet resistance) #'i6.
Chill at 5%. The implantation uniformity of high concentration ion implantation equipment is MO
In the manufacture of semiconductor integrated circuits such as S FETs, it is generally desirable that the ion beam is 1.5 or less. (Summary of the Invention) The key point of this invention is to form a thin oxide film on the semiconductor substrate before ion implantation, and through this to implant high concentration ions of 1014hL" level or higher into the semiconductor substrate. It is in the manufacturing method of the device.

(Embodiment) FIG. 5 shows an example in which the present invention is applied to a method of manufacturing a semiconductor element and a semiconductor device having an N-channel type MO8 structure. Field oxide film 11. )y'-
A silicon oxide film Jz, yf' is formed on the silicon electrode 13 (FIG. 5 [a]). The poly-silicon gate electrode 13 contains phosphorus at a high concentration (1020 to 1
021c! IL-5) is doped. Next, after removing the date oxide film 12 on the source/drain regions of the semiconductor substrate by etching, a thin oxide film is formed by thermal oxidation. This is called an Ingla oxide film 14. Arsenic or phosphorus is ion-implanted at a high concentration (dose ill
O”/crl.

acceleration voltage 40 kV) (Fig. 5 [b]). The thickness of the implant oxide film 14 is the projected range RP of impurities to be ion-implanted.
Make it thinner. Projected range RPc, implantation voltage, implanted material,
It depends on the injection. Drive voltage 40kV.

If the object to be implanted is silicon, then in the case of phosphorus, R = 480K.

For arsenic, RP=269X. The specific thickness of the insulator oxide film is determined by the dimensions of the semiconductor element or semiconductor device. In this example, the implant oxide film is 200X. The reason why the dirt oxide film 12 on the source/drain region is not used as the implant oxide film 14 is that the dirt oxide film thickness does not necessarily match the optimum implant oxide film thickness, and that the entire wear layer is covered with an oxide film. This is because it is not possible. After high-concentration ion implantation, if the insulator oxide film 14 is removed and annealing is performed, the source 15. A drain 16 is formed (FIG. 5 [C]). Then use the normal process.

The implant oxide film is generally preferably 200x or less. In addition, the dose amount is 1011 to 1 o147. *In medium concentration ion implantation and low concentration ion implantation systems with a dose of 1010 to 1012 AIIL2, the temperature rise of the semiconductor substrate,
This eliminates the problem of charge-up due to the cooling sheet. Furthermore, since the charge density of the beam system is not high, alignment does not occur with respect to problems such as lightning and repulsion of loads.

(Effects of the Invention) As described above, this invention provides a thin insulator oxide film 14.
High concentration ion implantation is performed through. Implant oxide film 1
The 4#'i ion implantation not only implants impurities but also forms a large number of defects, thereby forming an electrically conductive layer. Since this electrically conductive layer prevents charge concentration, implantation uniformity deteriorates even when ion implantation is performed using a high-concentration ion implanter equipped with a cooling wafer cooling mechanism and an ion beam current measurement circuit using magnetic suppression method. This has the advantage that no such phenomenon occurs. FIG. 6 shows this, and is the sheet resistance distribution when a 200X implant oxide film was formed before ion implantation and was processed at the same time as the wafer in FIG. 4. The injection uniformity was good at a factor of 0.35.

Therefore, the present invention aims to perform ion implantation with a uniform sheet resistance distribution in order to solve the problems of charge-up due to the cooling sheet and beam diameter divergence due to the charge of the beam itself in a high-concentration ion implantation device with a dose of 1014 layers or more. It is possible to provide a method for manufacturing a semiconductor device that can perform the following steps.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of the structure of the disk that holds the wear of the high-concentration ion implanter, Figure 2 is an explanatory diagram of the electrostatic suppression method,
FIG. 3 is an explanatory diagram of the magnetic suppression method, FIG. 4 is a map showing an example of sheet resistance distribution according to the prior art, FIG. 5 is an explanatory diagram of the method of manufacturing a semiconductor device according to the present invention, and FIG. 1 is a map showing an example of sheet resistance distribution according to the present invention. 1... Disc, 2... Cooling sheet, 3...
・Wafer, 4... Wear clamp, 5... Aperture, 6... Faraday, 7... Bias electrode, 8... Bias power supply, 9... Ammeter, 1...
・Field identification film, No. 2... Dirt oxide film, 13.
..I silicon f-) electrode, 14.. implant oxide film, 15.. source, 16.. drain. Patent applicant Oki Electric Industry Co., Ltd. Figure 1 Figure 2 [b] PRESSLIF? E (TORRl Figure 3 bl PF? ESSLIPE (TORRI Figure 5 Figure 4 Figure 6 Procedural amendment (voluntary) 1. Indication of the case 1982 Patent Application No. 050857 2. Name of the invention Manufacture of semiconductor devices Method 3: Relationship with the person making the amendment Patent applicant office (105) 1-7-12 Toranomon, Minato-ku, Tokyo
No. 4, Agent Address (105) 1-7-12 Toranomon, Minato-ku, Tokyo
No. ``Brief explanation of drawings'' column and drawings ``Figure 4'' and ``6
Figure 6, Contents of the Amendment, Contents of the Amendment (1) In the 18th line to the 19th line of page 1 of the specification, the phrase ``Ratio of ion implantation'' was replaced with ``Ratio of ion implantation''. ”
and correct it. (2) In the same book, page 5, line 9 to line 10: [The width of one line indicates 2.5 inches. "The width of one line is 24
5%.'' (3) From line 10 to line 11 of the same page, “Indicated in bold line,
It is 9%. ” is indicated by a thick line. ] and correct it. (4) The words "implantation voltage" in the third and fourth lines of page 7 of the same book are corrected to "acceleration voltage." (5) Delete the phrase "Insira oxide film...preferable." from line 18 to line 19 of the same page. (6) In the first line of page 8 of the same book, the phrase ``In the injection system,'' has been amended to ``In the injection system.'' (7) In the first line of page 9 of the same book, the phrase ``the present invention uses a dose amount'' is corrected to ``the present invention uses a high-concentration ion implantation device.'' (8) In the second line of the same page, the words "in the injection device" are corrected to "j that occurs when injecting." (9) In the seventeenth line of the same page, the words "6...Faraday" are corrected. is corrected to "6...Faraday". θ1 Correct the drawings “Figure 4” and “Figure 6” on separate sheets.

Claims (1)

[Claims] a step of forming an oxide film thinner than the projected range of impurities to be ion-implanted on a semiconductor substrate; and a step of performing high-concentration ion implantation at a dose of 10/cxi' or more into the patterned semiconductor substrate through the thin oxide film. A method of manufacturing a semiconductor device, comprising: