JPS6199229U - - Google Patents
Info
- Publication number
- JPS6199229U JPS6199229U JP18370984U JP18370984U JPS6199229U JP S6199229 U JPS6199229 U JP S6199229U JP 18370984 U JP18370984 U JP 18370984U JP 18370984 U JP18370984 U JP 18370984U JP S6199229 U JPS6199229 U JP S6199229U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- relay
- latch
- output
- exclusive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Programmable Controllers (AREA)
- Relay Circuits (AREA)
Description
第１図は本考案の一実施例を示す回路図、第２
図は従来例を示す回路図である。
１……マイクロコンピユータ、２……データラ
ツチ、３……アドレスレコーダ、４……ドライバ
、５……外部回路、８……ノーマリオープン／ノ
ーマリクローズ設定用ラツチ、９ｉ……排他的論
理和回路、Ｒｉ……リレー、ｒｉ……接点。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a circuit diagram showing a conventional example. 1... Microcomputer, 2... Data latch, 3... Address recorder, 4... Driver, 5... External circuit, 8... Normally open/normally close setting latch, 9i... Exclusive OR circuit , Ri...relay, ri...contact.
Claims (1)
データをラツチしてリレーに出力するデータラツ
チ回路を備えたリレー出力回路において、データ
ラツチ回路と並列にリレー負荷回路のノーマリオ
ープン／ノーマリクローズ設定用ラツチ回路を設
けるとともに、両ラツチ回路の対応する各ビツト
出力を入力すると排他的論理和回路を設け、この
排他的論理和回路の出力を対応する各リレーに送
出するようにしたことを特徴とするリレー出力回
路。 In a relay output circuit equipped with a data latch circuit that latches input data and outputs it to the relay when a latch strobe signal is applied, a latch circuit for normally open/normally close setting of the relay load circuit is installed in parallel with the data latch circuit. A relay output circuit characterized in that an exclusive OR circuit is provided when each corresponding bit output of both latch circuits is input, and the output of this exclusive OR circuit is sent to each corresponding relay. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18370984U JPH0142162Y2 (en) | 1984-12-05 | 1984-12-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18370984U JPH0142162Y2 (en) | 1984-12-05 | 1984-12-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6199229U true JPS6199229U (en) | 1986-06-25 |
| JPH0142162Y2 JPH0142162Y2 (en) | 1989-12-11 |
Family
ID=30741204
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18370984U Expired JPH0142162Y2 (en) | 1984-12-05 | 1984-12-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0142162Y2 (en) |
-
1984
- 1984-12-05 JP JP18370984U patent/JPH0142162Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0142162Y2 (en) | 1989-12-11 |
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