JPS6195553A - Multilayer wiring structure of semiconductor integrated circuit and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a multilayer wiring structure which assures microminiaturization, excellent moisture resistance and flatness characteristic by forming an interlayer insulating film of a double-layer structure of soluble polyimide resin film and silicon oxide film obtained by baking silicon oxide organic compound and forming a through hole in the two steps of the dry etching of silicon oxide film and dry etching of double polyimide resin. CONSTITUTION:A semiconductor substrate 1 providing a first wiring conductor layer 2 is coated with soluble polyimide resin soluction by the spin coating method and solvent is removed by heat processing under the nitrogen ambient. The soluble polyimide resin film 7 is the coated with silicon oxide organic compound and solvent is removed by heat processing. Thereafter, silicon oxide film 8 is formed through baking under the mixed gas of N2 and O2. This film is then coated with a resist film 4 and a pattern is formed. Thereafter the silicon oxide film 8 is dry-etched with the silicon oxide film 8 used as the mask. With the silicon oxide film 8 used as the mask, the soluble polyimide resin film 7 is etched by O2 plasma and simultaneously the resist 4 is removed. Next, Al is vacuum deposited and a resist mask is then formed thereon and a second wiring conductor layer 6 is formed by the etching.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a wiring structure for a semiconductor integrated circuit, and particularly to a multilayer wiring structure having a plurality of wiring layers, and a method for manufacturing the same.

Conventional structures and their problems Conventionally, when manufacturing multilayer wiring structures for semiconductor integrated circuits;
In order to solve the problem of flattening of the substrate, we are using thermosetting molecular resins (for example, thermosetting polyester resins such as Nib PIQ), which are easier to manufacture than inorganic materials. A multilayer wiring structure used as an interlayer insulating film has been proposed.

This structure and manufacturing method will be explained using thermosetting polyimide resin as an example and using FIGS. 1 to 4. First, spin cord Apply the polyimide intermediate 3 before thermosetting by the method and remove the solvent (Figure 1)
. Next, a resist is applied to the upper part of the polyimide intermediate layer, exposed through a mask having a predetermined pattern, and developed to form a pattern 7. H: Etch L and form a through hole using an alkaline solution such as radino and ethylene cyanide (5) and a footstool solution (Figure 3). After the polyimide intermediate is completely cured by JD heating, the through hole surface is cleaned by 02 plasma etching, etc., and 82 is vapor deposited to form a second wiring conductor layer (4th
figure).

In the above-mentioned conventional method, since the etching hole 11 is also etched at the same time, the etching of the polyimide intermediate layer and the side surface is accelerated, making it difficult to miniaturize the through hole. Furthermore, a method has been proposed for etching the polyimide intermediate in which the polyimide intermediate is semi-cured and then etched in a CF4/Q2 plasma using a resist as a mask. Since control is difficult and the etching rate ratio with the resist is not very high, it is necessary to increase the thickness of the resist film, and even with this method, miniaturization is difficult. It is an object of the present invention to provide a multilayer wiring structure with excellent moisture resistance and flatness that facilitates miniaturization accompanying high integration in circuits, and a method for manufacturing the same.

Structure of the invention The non-inventive feature is that the interlayer insulating film in the multilayer wiring structure has a two-layer structure of a soluble polyimide resin layer and a silicon oxide film formed by firing an organic compound of 7-licon oxide, and the through hole forming process is performed by drying the silicon oxide film. - It is characterized by having two steps: a notching step and a dry etching step of the soluble polyimide resin using the etched silicon oxide film as a mask.

Since the interlayer insulating film has a two-layer structure and both layers can be coated by spear coating, even if the thickness of each layer is thin, it is easy to make the film multilayered and sufficiently flattened.

Further, since the silicon oxide film has a small thickness, a film thickness of the resist serving as an etching mask of Q, 871 m or less is sufficient, and a fine pattern can be formed. Furthermore, since the etching is anisotropic etching, there is no side etching and gM': D-cutting is possible.

By using a soluble polyimide film as the resin layer, the heat curing process that was previously required can be omitted, and the resist can be removed at the same time as etching the soluble polyimide resin. Even if over-etching is performed to clean the through-holes, the etching rate ratio between the resin film and the silicon oxide film is sufficiently large, so problems such as film peeling do not occur, and a stable Ominokko/Tact can be formed. can.

In addition, in terms of reliability, if only the VOLII material is supported, it has high hygroscopicity and causes moisture resistance, but a silicon oxide film is formed on the resin. , it is possible to prevent moisture from entering the resin layer, and it is possible to improve the properties of i1'':.

Explanation of “Implementation” The invention will be explained in detail using examples. .

A first conductive layer (layer 2) having a predetermined pattern is formed on the semiconductor substrate 1 with one trough, f,
VJIC-2,5・k synthetic rubber (Kyu)) was coated to a thickness of 0.8 μm to 1.07 zm using a spin cord remover, dissolved and removed by processing at 200'C x 20 mm lA% in nitrogen (No. 5). , g) 4. Soluble polyester 7 upper part:
After baking, apply the oxidized/likonoy@compound to approximately 3,000 people. After removing the solvent by heat treatment at 150° C. and 20 mI/I, a silicon oxide film 8 is formed by firing at 350° C. 0.771 on this film
A resist film 4 of m is applied, and a pattern 7 is formed through the usual photolithographic process l) (FIG. 6). Using the resist film 4 as a mask, the silicon oxide film 8 is dry etched using 7 Leon gas (FIG. 7). Next, using the silicon oxide film 8 as a mask, the soluble polyimide resin film 7 is subjected to 02 plasma etching, and the resist 4 is removed at the same time. By over-etching the resin film, the through-hole surface is cleaned (FIG. 8).

Ai is deposited, a resist mask is formed on top of it through a normal photolithography process, and a second wiring conductor layer 6 is formed by etching (FIG. 9).

By the above method, it is possible to efficiently manufacture a multilayer interconnection structure with excellent moisture resistance (+7 takt), which is capable of radiation and wiring work. .

Effects of the Invention As described above, the present invention uses a soluble polyimide resin that can be easily flattened by spin coating, does not require heat curing, and can remove the resist at the same time as etching the soluble polyimide resin. Oxidation on polyimide film/
By including the recon organic compound, it is possible to produce a multilayer wiring transparent material with good yield, which has excellent moisture resistance and is easy to microfabricate.

[Brief explanation of drawings]

Ru. 1 substrate, 2...first wiring conductor layer, 4 resist,
6--Second wiring conductor layer, 7--Soluble polyimide resin, 8--Silicon oxide film. 11th A 5th A? Figure 6 4

Claims (4)

[Claims] (1) A first wiring conductor layer having a predetermined pattern provided on a semiconductor substrate, a soluble polyimide resin covering the first wiring conductor layer and extending over the substrate, and a silicon oxide organic compound are fired. a silicon oxide film extending on the resin layer; a second wiring conductor layer connected to the first wiring conductor layer through a hole penetrating the resin layer and the silicon oxide film; and a second wiring conductor layer provided on the first wiring conductor layer. A multilayer wiring structure for a semiconductor integrated circuit, comprising a plurality of wiring conductor layers having the same structure as the second wiring conductor layer and provided on the second wiring conductor layer. (2) A multilayer wiring structure for a semiconductor integrated circuit according to claim 1, characterized in that a polyorganosiloxane resin or ladder silicon is used as the silicon oxide organic compound. (3) A first step of forming a first wiring conductor layer having a predetermined pattern on a semiconductor substrate, a second step of applying a soluble polyimide resin on the substrate surface including the first wiring conductor layer, and a second step of applying a soluble polyimide resin on the resin layer. a third step of applying a silicon oxide organic compound to the silicon oxide film and heating it to form a silicon oxide film, a fourth step of applying a resist on the silicon oxide film to form a predetermined pattern, and using the resist as a mask to form a silicon oxide film. A fifth step of dry etching the soluble polyimide resin film using the silicon oxide film as a mask and simultaneously removing the resist, a first wiring conductor through the hole penetrating the silicon oxide film and the soluble polyimide film. A seventh step of forming a second wiring conductor layer having a predetermined pattern to be connected to the second wiring conductor layer, and repeating the steps from the second step to the seventh step as necessary to form a plurality of layers on the second wiring conductor layer. 1. A method for manufacturing a multilayer wiring structure for a semiconductor integrated circuit, comprising the step of forming a wiring conductor layer. (4) A method for manufacturing a multilayer wiring structure for a semiconductor integrated circuit according to claim 3, characterized in that a silicon oxide organic compound is heated in an oxidizing atmosphere to form a silicon oxide film.