JPS6188344A - パリテイ付加検出回路 - Google Patents
パリテイ付加検出回路Info
- Publication number
- JPS6188344A JPS6188344A JP59210686A JP21068684A JPS6188344A JP S6188344 A JPS6188344 A JP S6188344A JP 59210686 A JP59210686 A JP 59210686A JP 21068684 A JP21068684 A JP 21068684A JP S6188344 A JPS6188344 A JP S6188344A
- Authority
- JP
- Japan
- Prior art keywords
- parity
- data
- bit
- bits
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 47
- 238000010586 diagram Methods 0.000 description 8
- 239000000470 constituent Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012795 verification Methods 0.000 description 2
- 230000010365 information processing Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Landscapes
- Detection And Correction Of Errors (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59210686A JPS6188344A (ja) | 1984-10-08 | 1984-10-08 | パリテイ付加検出回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59210686A JPS6188344A (ja) | 1984-10-08 | 1984-10-08 | パリテイ付加検出回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6188344A true JPS6188344A (ja) | 1986-05-06 |
| JPS6361692B2 JPS6361692B2 (enExample) | 1988-11-30 |
Family
ID=16593421
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59210686A Granted JPS6188344A (ja) | 1984-10-08 | 1984-10-08 | パリテイ付加検出回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6188344A (enExample) |
-
1984
- 1984-10-08 JP JP59210686A patent/JPS6188344A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6361692B2 (enExample) | 1988-11-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR960001948B1 (ko) | 에러 조정 및 테스트 기능을 가진 프로그램 가능 메모리 제어 방법 및 장치 | |
| US4053871A (en) | Method and system for the iterative and simultaneous comparison of data with a group of reference data items | |
| US6353910B1 (en) | Method and apparatus for implementing error correction coding (ECC) in a dynamic random access memory utilizing vertical ECC storage | |
| JPS6140650A (ja) | マイクロコンピユ−タ | |
| US4016409A (en) | Longitudinal parity generator for use with a memory | |
| US3218612A (en) | Data transfer system | |
| US7287204B2 (en) | Memory unit test | |
| JPH03180933A (ja) | スタックメモリ | |
| JPH08161234A (ja) | プロセッサにより処理される指令の線形シーケンス実行保護方法及び装置 | |
| JPS6188344A (ja) | パリテイ付加検出回路 | |
| JPS6129024B2 (enExample) | ||
| JPS6130301B2 (enExample) | ||
| JP3021577B2 (ja) | Ramのテスト回路 | |
| JPH0241057B2 (enExample) | ||
| JP2518333B2 (ja) | 記憶装置 | |
| US3154676A (en) | Change adder | |
| SU881876A1 (ru) | Запоминающее устройство с обнаружением ошибок | |
| SU970480A1 (ru) | Запоминающее устройство с самоконтролем | |
| JPS63231553A (ja) | 部分書込み方式 | |
| JP2567986B2 (ja) | データ処理システム | |
| JPS63240638A (ja) | パリテイ検査回路 | |
| JPS6054059A (ja) | 記憶装置 | |
| JPH02213965A (ja) | メモリ素子およびメモリ装置 | |
| JPS615500A (ja) | メモリ集積回路 | |
| JPH11296441A (ja) | 誤り訂正回路 |