JPS6186941U - - Google Patents

Info

Publication number
JPS6186941U
JPS6186941U JP17286884U JP17286884U JPS6186941U JP S6186941 U JPS6186941 U JP S6186941U JP 17286884 U JP17286884 U JP 17286884U JP 17286884 U JP17286884 U JP 17286884U JP S6186941 U JPS6186941 U JP S6186941U
Authority
JP
Japan
Prior art keywords
integrated circuit
scale integrated
substrate
metal plate
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17286884U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17286884U priority Critical patent/JPS6186941U/ja
Publication of JPS6186941U publication Critical patent/JPS6186941U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Die Bonding (AREA)

Description

【図面の簡単な説明】
第1図は本考案の一実施例の大規模集積回路の
基板への実装構造の上面図、第2図aおよびbは
一実施例の実装構造の側断面図、第3図は一実施
例の金属板の上面図、第4図a,bは従来の大規
模集積回路の基板への実装構造を示す一例断面図
、第5図a,bは発熱量の大きい大規模集積回路
の基板への実装構造の側断面図である。 図において、1は基板、2は大規模集積回路(
LSI)、3は接着剤、4はワイヤボンド、5は
テイプオートメイテツドボンデイング、6は電気
回路、7は貫通孔、8はメタルコア、9は金属板
、10は金属板の穴をそれぞれ示している。

Claims (1)

    【実用新案登録請求の範囲】
  1. 電気回路を形成する基板上に大規模集積回路を
    固定し、前記電気回路に前記大規模集積回路の出
    力端を接続する大規模集積回路の基板への実装構
    造において、前記両回路の接続個所に対応した位
    置に穴を有する金属板を備えるとともに、前記金
    属板を前記基板と、前記大規模集積回路との間に
    挟着して付設したことを特徴とする大規模集積回
    路の基板への実装構造。
JP17286884U 1984-11-13 1984-11-13 Pending JPS6186941U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17286884U JPS6186941U (ja) 1984-11-13 1984-11-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17286884U JPS6186941U (ja) 1984-11-13 1984-11-13

Publications (1)

Publication Number Publication Date
JPS6186941U true JPS6186941U (ja) 1986-06-07

Family

ID=30730527

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17286884U Pending JPS6186941U (ja) 1984-11-13 1984-11-13

Country Status (1)

Country Link
JP (1) JPS6186941U (ja)

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