JPS6186801A - Analog input processing method for digital sequence controller - Google Patents

Abstract

PURPOSE:To eliminate the discordance of working between two central processors by continuing the working of a timer without resetting the timer immediately after the timer is once started even though the electric power is temporarily reduced less than a reference level. CONSTITUTION:The electric power sent from a power generator 12 is supplied to the analog input device 4 of a sequencer 1 containing two central processors 7 and 8 via a current transformer 11, a transformer 10 and a power converter 9. The electric power which changes with the lapse of time is compared with a reference level at both processors 7 and 8 respectively. The value of a counter is increased in case said electric power is larger than the reference level and the count value of an internal counter is smaller than a prescribed level and then set at the upper limit level when the count value of the internal counter is larger than the prescribed level. While the value of the counter is reduced in case the electric power is less than the reference level and the count value is not set at zero. Finally a timer is started if the final count value of the counter is larger than another prescribed level. Otherwise the above-mentioned comparison is repeated after the timer is reset.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an analog input processing method for a digital sequence control device.

[Conventional technology]

Conventionally, as this type of analog input processing method, for example, the catalog ``Mitsubishi Electric Power Plant Controller, DCN-7
0@double unit system”.

A block diagram of the digital sequence control device (hereinafter referred to as sequencer) shown in this catalog is shown in FIG. In the figure, 1 is a sequencer, 2 is an A-system bus,
3 is the B system bus, 4 is the analog input device (AI), 5 is the digital input device (DI), 6 is the digital output device (Do), 7 is the A system central processing unit (CPU), 8 is the B system
This is the CPU of the system. Also, 9 is a power converter, and 10 is a transformer (
PT), 11 is a current transformer (CT), and 12 is a generator.

Next, the operation will be explained. The output of the generator 12 changes with time as shown in FIG.
The signal is input as an analog input signal to the A-engine 4 via the TI l and the power converter 9, and is sequentially converted into a digital signal by the AI 4, and then input to the CPU 7.8 as the power value of the generator 12.

If this power value A continues to be equal to or higher than a preset reference value B (indicated by a dotted line in FIG. 3) for a certain period of time, the process moves to the next sequence control process. A flowchart of such a conventional analog input processing method is shown in FIG. In process 15, the power value A
is compared with reference value B, that is, the calculation of A-B is performed, and it is determined whether the result of the calculation is negative, zero, or positive. If the result is negative or zero, the timer 16 is reset, and if the result is positive, the timer 16 is started. As a result, if the timer 16 continues counting for a certain period of time, it will become time-up.
The output of the timer 16 is turned on and the process moves to the next sequence control process. The analog input signal (1! force value) input to AI4 changes from moment to moment as shown in Figure 3, so if CPU7 and CPU8 are operated asynchronously, it may change depending on the timing. Since only the CPU 7 resets the timer 16 and starts the timer 16 in the next cycle, the CPUs 7 and 8 result in a mismatch between the outputs of the DO6. In FIG. 3, 1 indicates the read cycle of the A-system CPU 7, and TB indicates the read cycle of the B-system CPU 8. Therefore, the B-system CPU 8 reads the power value A when m-reference value B or less, while the 〇PU7 reads the power value A when it is larger than the reference value B.

[Problem that the invention seeks to solve]

Conventional analog input processing methods are configured as described above, and the timer is reset in response to momentary fluctuations in the input power value, so this is especially true when the timer setting value is long. The time when the fluctuation is read is D.
If the time is longer than the set time of the timer for determining the mismatch of 0, there is a problem that a mismatch of DO will occur during the recount, resulting in an alarm or tripping of the generator output.

The present invention was made in order to eliminate the problems of the conventional ones as described above, and it is an object of the present invention to provide an analog processing method for a digital sequence control device that reduces the probability of DO mismatch to a level that does not pose a practical problem. purpose.

[Means for solving problems]

The analog input processing method for a digital sequence processing device according to the present invention includes a process of comparing a power value that changes with time with a reference value, and a process in which the power value is determined to be larger than the reference value through this process, and a counter is less than a predetermined count value, the counter is increased; on the other hand, when the power value is greater than the reference value but the counter is greater than or equal to the count value, the count value is set to an upper limit value; If the comparison process determines that the power value is less than or equal to the reference value, and the count value is not zero, the count value is subtracted, and following each of the above processes,
When the count value is greater than or equal to another predetermined count value, a timer is started; otherwise, the timer is reset, and then the process returns to the comparison process.

[For production]

In this invention, even if the power value temporarily drops below the reference value after the timer starts at -H, the timer operation proceeds without immediately resetting the timer, and the timer operation is continued between the two central processing units. Eliminate inconsistencies in processing.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
FIG. 2 is a flowchart showing the analog input processing method of the present invention, which is executed by the digital sequence control device shown in FIG. 2 described above.

In FIG. 1, 19 is a process for resetting the counter M upon program start. In judgment 15 following process 19, power value A and reference value B should be compared (A-
Execute B. If the result of A-B is negative or zero, M =
Execute O's decision M20. If it is determined that M-0 is Yes, then judgment 21 is executed; otherwise, when it is determined that it is NO, processing 22 of M=M-1 is executed. On the other hand, A
- When the result of H is positive and the result of process 23 is M2O, process 24 with M=10 is performed, and when it is not M2O, it is 1
= M +1 processing 25 is executed and the process proceeds to judgment 21.

If it is M2S according to judgment 21, process 26t for X=1.
L. Start timer 16. If it is not M2S, the X-00 process 27 is performed and the timer 16 is reset. After the timer 16 has processed, the process returns to judgment 15 again.

〔Effect of the invention〕

As described above, according to the present invention, after the timer is started when the detected power value continues to exceed the reference value for a predetermined period, even if the power value temporarily falls below the reference value, Since the timer is not reset immediately, it is possible to prevent the processing results of each central processing unit from being inconsistent and to prevent undesirable traffic jams in analog input processing.

[Brief explanation of drawings]

Claims (1)

[Claims] A process of comparing the power value that changes over time with a reference value, and incrementing the counter when the power value is determined to be greater than the reference value through the comparison process and the counter is less than a predetermined count value. and a process of setting the counter to an upper limit value when the power value is determined to be larger than the reference value by the comparison process and the counter is greater than or equal to the predetermined count value, and a process of setting the counter to an upper limit value by the comparison process. If the power value is determined to be below the reference value and the count value is not zero, the count value is decreased, and after each of the above processes, if the count value is greater than or equal to another predetermined count value, the timer is activated. An analog input processing method for a digital sequence control device, comprising: starting the count value, and resetting the timer when the count value is less than a predetermined other count value, and returning to the comparison process.