JPH05252552A - Load control system - Google Patents

Load control system

Info

Publication number
JPH05252552A
JPH05252552A JP4048394A JP4839492A JPH05252552A JP H05252552 A JPH05252552 A JP H05252552A JP 4048394 A JP4048394 A JP 4048394A JP 4839492 A JP4839492 A JP 4839492A JP H05252552 A JPH05252552 A JP H05252552A
Authority
JP
Japan
Prior art keywords
processing
control unit
buffers
input signal
control part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4048394A
Other languages
Japanese (ja)
Inventor
Hiroaki Osawa
博彰 大沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4048394A priority Critical patent/JPH05252552A/en
Publication of JPH05252552A publication Critical patent/JPH05252552A/en
Withdrawn legal-status Critical Current

Links

Landscapes

  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE:To make a station design simpler than a conventional technique depending on the number of buffers, and to reduce a delay time or a load due to the dependence of a processing on a software side. CONSTITUTION:When a central control unit 1 operates an input signal processing by an on-line, a utilizing efficiency measuring part 11 periodically measure a utilizing efficiency under the control of a timer control part 13 (processing step S1-S3). An interruption control part 12 receives the measured result of the utilizing efficiency, and judges whether or not the measured value is within a preliminarily decided reference value (S4). And also, when the measured value is beyond the reference value, the interruption control part 12 judges whether or not the number of times continuously generated within a prescribed time is more than (n) (S5), judges the danger of an influence on the other processing when the number of times of more than (n), starts an interruption program, and controls the input signal processing (S6).

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は負荷制御方式に関し、特
にオンラインリアルタイムシステムの中央制御装置の使
用能率を利用した負荷制御方式に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a load control system, and more particularly to a load control system utilizing the utilization efficiency of a central controller of an online real-time system.

【0002】[0002]

【従来の技術】従来、この種の負荷制御方式では、入出
力信号を取り込むバッファの数によって処理できるオン
ラインリアルタイムシステムとしての入力信号の数に制
限を与えることによって負荷を制御している。即ち、取
り込むべき入力バッファがすべて使用されている時には
これ以上の入力信号を取り込まずに内部処理に専念する
方式になっている。
2. Description of the Related Art Conventionally, in this type of load control system, the load is controlled by limiting the number of input signals as an online real-time system that can be processed by the number of buffers that take in input / output signals. That is, when all the input buffers to be fetched are used, the system concentrates on the internal processing without fetching any more input signals.

【0003】[0003]

【発明が解決しようとする課題】この従来の負荷制御方
式では、取り込める入力信号数はバッファ数によって決
まるので、システム設計時にバッファの数を余分に用意
すると、空きの状態のバッファがあっても中央制御装置
が処理しきれないので、実際には中央制御装置の輻輳を
招く恐れがあった。また逆に、バッファの数を小さくす
ると、中央制御装置の使用能率の低い状態で全バッファ
がビジーとなり、入力信号に規制がかかって中央制御装
置の使用能率は悪いまま運用される。
In this conventional load control system, the number of input signals that can be fetched is determined by the number of buffers. Therefore, if an extra number of buffers is prepared at the time of system design, even if there are empty buffers, the buffer will be Since the control device could not handle all the processing, there was a possibility that the central control device would actually be congested. On the contrary, if the number of buffers is reduced, all the buffers become busy when the efficiency of use of the central control unit is low, and the input signal is restricted, so that the central control unit is operated with poor utilization efficiency.

【0004】即ち、従来の負荷制御はバッファ数の設計
値自体に大きく依存し、且つバッファ数の設計が非常に
難しいという問題があった。また、機能追加によりサー
ビスのダイナミックステップ数が増加したときは、その
都度バッファ数を変更する必要が生じるという問題点が
あった。
In other words, the conventional load control has a problem that it largely depends on the design value itself of the number of buffers and that the design of the number of buffers is very difficult. In addition, when the number of dynamic steps of the service increases due to the addition of the function, there is a problem that the number of buffers needs to be changed each time.

【0005】本発明の目的は、バッファ数に関係なく、
中央制御装置の使用能率によって信号規制をかけるよう
にした負荷制御方式を提供することにある。
The object of the present invention is to
An object of the present invention is to provide a load control system in which a signal control is applied according to the usage efficiency of a central control device.

【0006】[0006]

【課題を解決するための手段】本発明の負荷制御方式
は、オンラインリアルタイム系システムの中央制御装置
は自中央制御装置の使用率を測定する使用能率測定手段
を備えることを特徴とする。
The load control system of the present invention is characterized in that the central control unit of the online real-time system is provided with a utilization efficiency measuring unit for measuring the utilization rate of its own central control unit.

【0007】[0007]

【実施例】次に、本発明について図面を参照して説明す
る。図1(a)は本発明の一実施例を示す中央制御装置
のブロック図、(b)は同図(a)における動作を示す
フローチャートである。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1A is a block diagram of a central control unit showing an embodiment of the present invention, and FIG. 1B is a flow chart showing the operation in FIG.

【0008】本実施例の中央制御装置1はオンライン系
で入力信号の処理を実行しているときその使用能率を測
定する使用能率測定部11と、使用能率の測定値が基準
値を超えたときソフトウェアに入力規制を通知する割込
み制御部12と、中央制御装置の各種の処理時間を管理
するタイマ制御部13とを備えている。なおソフトウェ
アは主記憶装置2に格納されている。
The central control unit 1 of the present embodiment has a utilization efficiency measuring section 11 for measuring the utilization efficiency of an online system while processing an input signal, and a utilization efficiency measurement value exceeding a reference value. An interrupt control unit 12 for notifying the software of the input regulation and a timer control unit 13 for managing various processing times of the central control unit are provided. The software is stored in the main storage device 2.

【0009】続いて本実施例の動作について説明する。
中央制御装置1がオンラインで入力信号処理を行ってい
るとき、使用能率測定部11はタイマ制御部13の制御
の下に使用能率を周期的に測定する(処理ステップS
1,〜3)。割込み制御部12は使用能率の測定結果を
受けてこの測定値が予め定めた基準値以内か否かを判断
し(S4)、この基準値を超えていればその回数が所定
の時間内に連続的にn回以上発生したかを判断し(S
5)、n回を超えていれば他の処理に影響を与える恐れ
ありと判断して割込みプログラムを起動して入力信号処
理を規制する(S6)。
Next, the operation of this embodiment will be described.
When the central controller 1 is performing the input signal processing online, the usage efficiency measuring unit 11 periodically measures the usage efficiency under the control of the timer control unit 13 (processing step S
1, ~ 3). The interrupt control unit 12 receives the measurement result of the usage efficiency and judges whether or not the measured value is within a predetermined reference value (S4). If the measured value exceeds the reference value, the number of times is continuously within a predetermined time. The number of occurrences n times or more (S
5) If it exceeds n times, it is judged that it may affect other processing, and the interrupt program is activated to regulate the input signal processing (S6).

【0010】なお、S4でYes(使用能率が基準値以
内)のとき、またS5でNo(連続回数がn回未満)の
ときはS2に戻って入力信号処理は継続実行される。
If S4 is Yes (use efficiency is within the reference value) or S5 is No (the number of consecutive times is less than n times), the process returns to S2 and the input signal processing is continuously executed.

【0011】[0011]

【発明の効果】以上説明したように本発明によれば、中
央制御装置の使用能率測定機能を利用することにより、
バッファ数に依存していた従来の技術より局設計が簡単
になり、ソフトウェア側への処理の依存による遅延時間
や負担が少なくなる効果が得られる。
As described above, according to the present invention, the utilization efficiency measuring function of the central control unit is utilized,
The station design is simpler than the conventional technology that depends on the number of buffers, and the delay time and the burden due to the processing dependence on the software side are reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)は本発明の一実施例を示す中央制御装置
のブロック図、(b)は同図(a)における動作を示す
フローチャートである。
FIG. 1A is a block diagram of a central control unit showing an embodiment of the present invention, and FIG. 1B is a flowchart showing an operation in FIG. 1A.

【符号の説明】[Explanation of symbols]

1 中央制御装置 2 主記憶装置 11 使用能率測定部 12 割込み制御部 13 タイマ制御部 1 Central Control Unit 2 Main Memory Unit 11 Usage Efficiency Measuring Unit 12 Interrupt Control Unit 13 Timer Control Unit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 オンラインリアルタイム系システムの中
央制御装置は自中央制御装置の使用率を測定する使用能
率測定手段を備えることを特徴とする負荷制御方式。
1. A load control system in which a central control unit of an online real-time system is provided with a utilization efficiency measuring means for measuring a utilization rate of its own central control unit.
JP4048394A 1992-03-05 1992-03-05 Load control system Withdrawn JPH05252552A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4048394A JPH05252552A (en) 1992-03-05 1992-03-05 Load control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4048394A JPH05252552A (en) 1992-03-05 1992-03-05 Load control system

Publications (1)

Publication Number Publication Date
JPH05252552A true JPH05252552A (en) 1993-09-28

Family

ID=12802085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4048394A Withdrawn JPH05252552A (en) 1992-03-05 1992-03-05 Load control system

Country Status (1)

Country Link
JP (1) JPH05252552A (en)

Similar Documents

Publication Publication Date Title
KR970059886A (en) Method and system for controlling the operation of the computer according to the operating characteristics of the central processing unit
JPH05252552A (en) Load control system
JP2508277B2 (en) Method for determining the number of buffers that can be held
JPH04358228A (en) Process number control system
JP3146084B2 (en) Data display system
JPS62198294A (en) Transmission method for analog input data
JPH1063603A (en) Peripheral control device and its load state setting method
JPH04169953A (en) Computer system
JPS5860333A (en) Priority controlling method for plural terminal devices
JPS583534A (en) Automatic monitoring interval setting system
JPS6343560Y2 (en)
JP2506620Y2 (en) Electronic temperature controller
JPH04264951A (en) Digital signal processor
JP3208143B2 (en) Input / output controller of power controller
JPH05342865A (en) Dynamic memory control system
JPH0350625A (en) Busy control circuit
JPS616704A (en) Programmable controller
JPH05151123A (en) Transmission data processor
JPH0285722A (en) System for monitoring process data
JPH0495102A (en) Control data transmission equipment
JPH0675780A (en) Interruption controller
JPS62198295A (en) Transmission method for analog output data
JP2000010888A (en) Input/output control method
JPH08305544A (en) Graphic data processing system in graphic processing system
JPH0553836A (en) Method for automatically deciding task execution priority order

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19990518