JPS6033654A - Inter-microprocessor data transferring system - Google Patents

Abstract

PURPOSE:To simplify a device, to prevent a halt of a processing, etc., and to obtain advantageous program constitution by executing simultaneously a periodic interruption with regard to all microprocessors, when transferring a data between plural microprocessors. CONSTITUTION:Each microprocessor 1, 2 and 3 usually executes a data processing, respectively, but a periodic interruption is executed by detecting a rise of an 8ms clock pulse generated from clock pulse generators 5, 6. That is to say, all microprocessors execute simultaneously a periodic interruption program for controlling a data transfer between the microprocessors. By this periodic interruption program, whether the data transfer is necessary between each other or not is decided, and when it is necessary, the processing is ended after the data transfer of a prescribed quantity. In this way, the data transfer is executed by a common 8ms period to constitute advantageously a program and improve the stability of a system.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data transfer method between microprocessors.

Conventionally, the 47i City Memorib iSai and 47i Busnao were used to transfer data between multiple microprocessors, but both required specialized equipment to control data transfer. The drawback was that the hardware configuration and program configuration were complicated.

The present invention provides the following advantages when data transfer is required between multiple microprocessors and when each microprocessor controls the data transfer using a periodic activation program.
By making the startup timing common to all microprocessors participating in data transfer between microprocessors, we have created a data transfer method between microprocessors that does not require a dedicated device to control data transfer and achieves advantages in program configuration. The purpose is to provide.

That is, in the data transfer method between microprocessors in a system using multiple microprocessors, Kinoe 8A transfers data between each processor using a data transfer bus that interconnects each of Nendo's processors. , and is characterized in that the periodic interrupts of each processor are synchronized and the periodic interrupt program is executed simultaneously in each processor.

In addition to such a configuration, the present invention enables data transfer between multiple microprocessors, which has conventionally been processed by irregular interrupt operations, to be performed by simultaneous periodic interrupts for all microprocessors. We have achieved a simpler program configuration compared to processing.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a microprocessor system to which the data transfer method of the present invention is applied.

The system shown in the figure includes general-purpose microprocessors 1 and 2.
．． 3, clock pulse generators 5 and 6, and a signal switching circuit 4.

In FIG. 1, microprocessors 1.213 are interconnected by a data transfer bus 7 to transfer data between them. Also, an 8mS clock pulse generator 5,
6, one of the signals is selected by the signal switching circuit 4, and the entire GMS clock pulse is sent to the microprocessor. Supply to 1,2°3. The selection method is to always select the output of the 8mS clock pulse generator 5 preferentially, and
Only when an abnormality in the clock pulse of the mS clock pulse generator 5 is detected, the output of the 8 mS clock pulse generator 6 is selected.

Each microprocessor i, 2.3 executes data processing individually in normal times, but when the rising edge of the 8 ms clock pulse is detected, all microprocessors simultaneously execute the periodic interrupt program or Executes a program that controls data transfer between microprocessors. The periodic interrupt program of each microprocessor determines whether data transfer is necessary between each other, and if data transfer is necessary, the specified number of data transfers is 0.
5. Process H'T L and execute individual data processing again.

The reason for the misfire ψ1 is the above theory.As mentioned above, all microprocessors are involved in data transfer between microprocessors at the same time in a common 8 ms cycle, so a large amount of data can be transferred at once with periodic interrupts, and irregular There is no need to interrupt program processing or execution due to interrupts, which is advantageous for program development.Furthermore, in order to share one periodic interrupt signal among all microprocessors, periodic interrupts Duplicating signals is disadvantageous in terms of stability when the microprocessor is considered as one system.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a microprocessor system to which the transfer method of the present invention is applied. 1.2.3... General purpose microprocessor 5.6...
8mS clock pulse generator 4...signal switching circuit
7...Data transfer) 4th applicant: 1 person other than NEC Corporation

Claims (1)

[Claims] In a data transfer method between microprocessors in a system using a plurality of microprocessors, data transfer between each processor is performed using a data transfer bus that interconnects arbitrary processors, and each An inter-microprocessor data transfer method characterized by a structure in which periodic interrupts of processors are synchronized and periodic interrupt programs are simultaneously executed in each processor.