JPS6181658A - Plastic package type semiconductor device - Google Patents
Plastic package type semiconductor deviceInfo
- Publication number
- JPS6181658A JPS6181658A JP59203101A JP20310184A JPS6181658A JP S6181658 A JPS6181658 A JP S6181658A JP 59203101 A JP59203101 A JP 59203101A JP 20310184 A JP20310184 A JP 20310184A JP S6181658 A JPS6181658 A JP S6181658A
- Authority
- JP
- Japan
- Prior art keywords
- aluminum
- film
- electrode
- wiring
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Local Oxidation Of Silicon (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、プラスチックパッケージ形半導体装置におい
て、特に耐湿、耐腐食性の改善をはかった構造に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a plastic package type semiconductor device, particularly to a structure with improved moisture resistance and corrosion resistance.
第２図に従来例の一般的なプラスチックパッケージ形半
導体装置の一例を示す。シリコン基板１上に酸化膜２を
形成し、更にアルミニウム皮膜による電極引出パッド部
４、配線部３を設け、全面をパノシヘーション保護膜６
にて被覆し、しかる後アルミニウムパッド部を露出させ
る。パッド部に金またはアルミニウム線９にてボンディ
ング後、全体をプラスチックモールド材８にて覆い、外
気や湿気から保護する。FIG. 2 shows an example of a conventional general plastic package type semiconductor device. An oxide film 2 is formed on a silicon substrate 1, and an electrode lead-out pad part 4 and a wiring part 3 made of an aluminum film are further provided, and the entire surface is covered with a panocytosis protective film 6.
After that, the aluminum pad portion is exposed. After bonding to the pad portion with a gold or aluminum wire 9, the entire body is covered with a plastic molding material 8 to protect it from outside air and moisture.
しかしプラスチ・ツクと金属引出線との境界面よりの水
分の浸入を完全に防止することは困難で、金属引出線と
の接触境界面を通して、保護膜が部分除去されているボ
ンディング部にｆｆ１Ｊ 達する。更にアルミニウム電
極パッド部のアルミニウム、及び保護膜とプラス千ツク
界面に沿って内部に拡散する。また場合によってはプラ
スチックのピンホール、クランク等を通して千ノブの表
面に到達する水分もある。このように電極パッド部、お
よび保護膜を通して配線部に到達した水分は、アルミニ
ウムと化学反応をおこしてｊ高含作用を起こす。However, it is difficult to completely prevent moisture from entering through the interface between the plastic and metal lead wire, and reaches the bonding area where the protective film has been partially removed through the contact interface with the metal lead wire. . Further, it diffuses into the aluminum of the aluminum electrode pad portion and along the interface between the protective film and the plastic. In some cases, moisture may also reach the surface of the Sennobu through plastic pinholes, cranks, etc. The moisture that has thus reached the wiring section through the electrode pad section and the protective film causes a chemical reaction with aluminum, resulting in a j-high content effect.
水分による耐腐食性を改善するためアルミニウムの肉厚
を厚くすることは、集積度が高くなってくるとその後の
加工処理工程で殿能に悪影響を及ぼすことがあり、実施
することは困難である。また保ｇｆｆｉｌＱ上に到達し
微少クラック、ピンホール等を通して配線部に到達した
水分の影響は更に深刻であり、アルミニウム配線部の線
幅、線間ギャップ等の寸法は２〜３μと押さえられてい
るので、配線断、短絡、絶縁不良等の事故を起こし易い
。It is difficult to increase the thickness of aluminum in order to improve its corrosion resistance due to moisture, as the higher the degree of integration, the more it may have a negative effect on the performance of the aluminum during subsequent processing steps. . In addition, the influence of moisture that reaches the wiring section through minute cracks, pinholes, etc. on the protective gfffilQ is even more serious, and the line width, line gap, etc. of the aluminum wiring section is kept at 2 to 3μ. Therefore, accidents such as wiring breaks, short circuits, and poor insulation are likely to occur.
この対策として種々の構造が提案されている。Various structures have been proposed as countermeasures against this problem.
その内容としてはプラスチックモールド材と金属引出線
との接触面での接触強度の増大をはかる構造、プラスチ
ックモールド材自身の改善による耐湿性の向上、あるい
はアルミニウムかアルミニウムを含む物質を介在させる
構造等が提案されている。The contents include a structure that increases the contact strength at the contact surface between the plastic mold material and the metal leader wire, a structure that increases moisture resistance by improving the plastic mold material itself, and a structure that uses aluminum or a substance containing aluminum to intervene. Proposed.
本発明は、特に最後のアルミニウムあるいはアルミニウ
ムを含有した物質を介在させる構造に関係する。The invention particularly relates to structures in which the final aluminum or aluminum-containing material is interposed.
即ち、特公昭５６−２１２６５では第３図のごとく、ト
ランジスターのベース、コレクター、エミッターの各電
極よりの引出線１１ （ａ） 、 １１ （ｂ） 、
１１ （Ｃ）の根元部近傍に、アルミニウムまたはアル
ミニウムを含をする物質１２ （ａ） 、 １２ （ｂ
） 、 １２ （Ｃ）を塗布している。これによって、
浸入した水分はアルミニウムイオンを飽和量含むことに
なり、引出線１１、コネクターリード１３等を介して半
導体ペレット１４のアルミニウム電極に到達したときは
飽和状態となっているのでこれ以上の電極腐食は行われ
ない。That is, in Japanese Patent Publication No. 56-21265, as shown in Figure 3, the lead wires 11 (a), 11 (b),
11 (C) near the base of aluminum or a substance containing aluminum 12 (a), 12 (b)
), 12 (C) is applied. by this,
The infiltrated moisture will contain a saturated amount of aluminum ions, and when it reaches the aluminum electrode of the semiconductor pellet 14 via the lead wire 11, connector lead 13, etc., it will be in a saturated state and no further corrosion of the electrode will occur. It won't happen.
また、特開昭５．８−１０３１４７では、第４図のごと
くアルミニウム電極パッド部４と、その内部配線を取り
囲んで、保護膜６の下に導体膜７を設け、更に導体膜に
は、使用される最低電位を与えることにより、パッド部
周辺を保護する方法が提案されている。Furthermore, in JP-A-5.8-103147, a conductor film 7 is provided under the protective film 6 surrounding the aluminum electrode pad portion 4 and its internal wiring as shown in FIG. A method has been proposed for protecting the periphery of the pad portion by providing the lowest potential possible.
半導体装置の集櫃度の向上に伴って、アルミニウム配線
部の線幅、線間ギャップ等の寸法は益々小さくなる傾向
がある。水分による腐食の問題は、配線部に於いて顕在
化する。即ちアルミニウムパッド邪に到達した水分は、
パッド部は一般的に１００μ程度と比較的大きい寸法が
とれるので決定的な障害とはなりに（いが、保護膜を通
して配線部に到達した水分による腐食は大きな障害とな
ってくる。As the packing density of semiconductor devices improves, dimensions such as the line width and inter-line gap of aluminum wiring portions tend to become smaller and smaller. The problem of corrosion due to moisture becomes apparent in the wiring section. In other words, the moisture that reaches the aluminum pad is
Since the pad portion generally has a relatively large size of about 100 μm, it is not a decisive hindrance (although corrosion due to moisture reaching the wiring portion through the protective film becomes a major hindrance).
前述せる特許の構造は主として半導体ペレット１４のア
ルミニウム電極部に重点をおいているので、更に集積回
路でのアルミニウム配線部に重点をおいた腐食対策を効
率的に実施することが必要となってきている。第２図の
従来例で外部よりの水分の径路は、リード線９にそって
ポンディング部５に到達し、さらに保護膜とプラスチッ
クとの界面、および保護膜と配線部との界面に沿って内
部に浸入する。後者は大きなアルミニウムパッドによっ
て充分アルミニウムイオンを飽和した水分となり、配線
部に対する影響は小さいが、前者によるものは保護膜の
ピンホール、クラック等通してアルミニウム配線部にｌ
昼人して腐食作用をおこす。本発明は、このような径路
により浸入した水分によるアルミニウム配線部の腐食を
防止する半導体装置を提供することにある。Since the structure of the above-mentioned patent mainly focuses on the aluminum electrode portion of the semiconductor pellet 14, it has become necessary to efficiently implement corrosion countermeasures that also focus on the aluminum wiring portion of the integrated circuit. There is. In the conventional example shown in Fig. 2, the path of moisture from the outside is to reach the bonding part 5 along the lead wire 9, and further along the interface between the protective film and the plastic, and the interface between the protective film and the wiring part. Penetrate inside. The latter causes water to become sufficiently saturated with aluminum ions due to the large aluminum pad, and has little effect on the wiring, but the former causes water to penetrate through pinholes, cracks, etc. in the protective film and into the aluminum wiring.
It acts as a corrosive agent during the day. An object of the present invention is to provide a semiconductor device that prevents corrosion of the aluminum wiring portion due to moisture that has entered through such a path.
このような目的を達成するため本発明では、外部より浸
入した水分が、配線のアルミニウムに到達するまでの径
路の途中おいて、保護膜上で、電極パッド部を取り囲ん
で、リング状のアルミニウム金属を配置し、保護膜を通
してアルミニウム配線部に到達した水分が、アルミニウ
ム配線を腐食することのないような装置を提供すること
にある。In order to achieve such an object, the present invention provides a ring-shaped aluminum metal ring on the protective film, surrounding the electrode pad part, on the way that moisture intruding from the outside reaches the aluminum of the wiring. An object of the present invention is to provide a device in which moisture reaching an aluminum wiring portion through a protective film does not corrode the aluminum wiring.
プラスチックパッケージ形半導体装置Ｓこおいて、プラ
スチックと金属引出線との境界面、更に保護膜とプラス
チックとの界面に沿って内部に浸入した水分は、保護膜
上に形成されたアルミニウムリングと反応し、水分はア
ルミニウムイオンを飽和量含むことになる。従って保護
膜のピンホール、クランク等を通してアルミニウム配線
部に到達したときには、これ以上アルミニウムを腐食す
ることはない。In the plastic package type semiconductor device S, moisture that has entered the interior along the interface between the plastic and the metal lead wire and further along the interface between the protective film and the plastic reacts with the aluminum ring formed on the protective film. , the water will contain a saturated amount of aluminum ions. Therefore, when the aluminum wiring portion is reached through the pinhole, crank, etc. of the protective film, the aluminum will not be corroded any further.
本発明による実施例を第１図に示す。この図では半導体
装置の基本的な部分は簡単な溝底て図示している。シリ
コン基板１の上に、酸化膜２が形成され、引出電極とし
て、アルミニウム電極パッド部４、素子部連結用アルミ
ニウム配線部３が設けられる。更に電極部を除いて全面
をＰＳＧ（Ｐｈｏｓｐｈｏ ５ｉｌｉｃａｔｅ Ｇｌａ
ｓｓ） 、窒化シリコン欣等の保護膜６によって被覆す
る。ここまでの工程は従来の方法とは変わらない。次い
で本発明では保護膜６の上に、アルミニウムリング７を
電極パッド部４を取り囲むような形で形成する。ここで
リングと称しているが特に円形であることは必要としな
い。電極パッドを取り囲むような任意の形状でかまわな
い、このあと電極パッド部を露出させるためのエツチン
グを施してウェハー処理工程は終わる。ついで組立工程
に移り、ワイヤポンディング後全体を保護用プラスチッ
クモールド８にて覆うことにより半導体装置を完成する
。An embodiment according to the invention is shown in FIG. In this figure, the basic parts of the semiconductor device are shown as a simple groove bottom. An oxide film 2 is formed on a silicon substrate 1, and an aluminum electrode pad portion 4 and an aluminum wiring portion 3 for connecting an element portion are provided as extraction electrodes. Furthermore, the entire surface except for the electrode part is coated with PSG (Phospho 5ilicate Gla).
ss), covered with a protective film 6 such as silicon nitride. The steps up to this point are the same as the conventional method. Next, in the present invention, an aluminum ring 7 is formed on the protective film 6 so as to surround the electrode pad portion 4 . Although it is called a ring here, it does not need to be particularly circular. The wafer processing step is completed by performing etching to expose the electrode pad portion.The wafer processing step is then completed by performing etching to expose the electrode pad portion. Next, the assembly process begins, and after wire bonding, the entire semiconductor device is covered with a protective plastic mold 8 to complete the semiconductor device.
また他の実施例を第１図（ｃ）に示す。この図では保護
膜６の電極露出のためのエツチングを先に実施し、アル
ミニウムリング７を形成すると同時に、アルミニウムパ
ッド部４の上に、アルミニウムのボンディング用電極１
０を別に形成するもので、これによって電極部での腐食
対策シＪ果を更に高めることが可能となる。Another embodiment is shown in FIG. 1(c). In this figure, the protective film 6 is first etched to expose the electrode, and an aluminum ring 7 is formed.At the same time, an aluminum bonding electrode 1 is placed on the aluminum pad portion 4.
0 is formed separately, thereby making it possible to further enhance the anti-corrosion effect at the electrode portion.
ここで述べた実施例ではすべて説明をアルミニウムと簡
単に表現したが、シリコン、あるいは銅等の金属材料を
含んだ合金、即ちＡｌ−５ｉ 、Ａｌ−Ｃｕ、Ａｌ−５
ｉ−Ｃｕ等であってもかまわない。In the examples described here, all the explanations are simply expressed as aluminum, but alloys containing metal materials such as silicon or copper, such as Al-5i, Al-Cu, Al-5
It may be i-Cu or the like.
従来のアルミニウムリングを用いない半導体装置におい
ては、屡、電極バンド部近傍のアルミニウム配線部の腐
食による断線、短絡等がみられた。これはバンド部より
遠く離れる程、浸入した水分はアルミニウムイオンを多
（含むことになり、内部配線部に対する腐食影響が減少
するためと考えられるが、本発明の構造を採用すること
により高集積度半導体装置においても、装置の全面にわ
たってアルミニウム配線部の腐食を著しく低減すること
が可能となった。In conventional semiconductor devices that do not use aluminum rings, wire breakage, short circuits, etc. are often observed due to corrosion of the aluminum wiring portion near the electrode band portion. This is thought to be because the further away from the band part the more aluminum ions the infiltrated water contains, reducing the corrosion effect on the internal wiring. Even in semiconductor devices, it has become possible to significantly reduce corrosion of aluminum wiring parts over the entire surface of the device.
第１図（ａ）は本発明の実施例による半導体装置の部分
断面図、第１図（ｂ）はその電極部周辺の部分拡大平面
図を示す。更に第１図（ｃ）は他の実施例のパッド部周
辺の部分断面図を示す。第２図は従来の半導体装置の部
分断面図を示す。第３図、および第４図は公知のアルミ
ニウム電極部の腐食対策の構成を示す図面である。
図面において、１はシリコン基板、２は酸化膜、３はア
ルミニウム配線、４はアルミニウム電極バンド、５は引
出線ボンディング部、６は保護膜、７はアルミニウムリ
ング、８はプラスチックモールド、９は引出線、１０は
アルミニウムボンディング電極、１１は引出電極線、１
２はアルミニウム’４布物質、１３はコネクターリード
、１４は半導体ペレットをそれぞれ示す。
早１５２］（α）FIG. 1(a) is a partial sectional view of a semiconductor device according to an embodiment of the present invention, and FIG. 1(b) is a partially enlarged plan view of the periphery of an electrode portion thereof. Furthermore, FIG. 1(c) shows a partial cross-sectional view of the vicinity of the pad portion of another embodiment. FIG. 2 shows a partial sectional view of a conventional semiconductor device. FIGS. 3 and 4 are drawings showing the structure of known anti-corrosion measures for aluminum electrode parts. In the drawings, 1 is a silicon substrate, 2 is an oxide film, 3 is an aluminum wiring, 4 is an aluminum electrode band, 5 is a leader wire bonding part, 6 is a protective film, 7 is an aluminum ring, 8 is a plastic mold, and 9 is a leader wire. , 10 is an aluminum bonding electrode, 11 is an extraction electrode wire, 1
2 is an aluminum '4 cloth material, 13 is a connector lead, and 14 is a semiconductor pellet. early 152] (α)
Claims (1)
て、基板上の被覆保護膜の上に各引出し電極部を取り囲
み、リング状にアルミニウムまたはアルミニウム合金の
皮膜を設け、樹脂封止したことを特徴とするプラスチッ
クパッケージ形半導体装置。A plastic package type of a semiconductor device having wiring using an aluminum film, characterized in that a ring-shaped aluminum or aluminum alloy film is provided on a protective film on a substrate, surrounding each lead-out electrode part, and sealed with a resin. Semiconductor equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59203101A JPS6181658A (en) | 1984-09-28 | 1984-09-28 | Plastic package type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59203101A JPS6181658A (en) | 1984-09-28 | 1984-09-28 | Plastic package type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6181658A true JPS6181658A (en) | 1986-04-25 |
Family
ID=16468400
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59203101A Pending JPS6181658A (en) | 1984-09-28 | 1984-09-28 | Plastic package type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6181658A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4974052A (en) * | 1988-10-14 | 1990-11-27 | Mitsubishi Denki Kabushiki Kaisha | Plastic packaged semiconductor device |
-
1984
- 1984-09-28 JP JP59203101A patent/JPS6181658A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4974052A (en) * | 1988-10-14 | 1990-11-27 | Mitsubishi Denki Kabushiki Kaisha | Plastic packaged semiconductor device |
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