JPS6180896A - Multilayer wiring substrate - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to an organic material-based high-density multilayer wiring board on which at least two or more LSI chips or chip carriers can be directly mounted.

[Background of the invention]

A conventional multilayer wiring board will be explained below based on the drawings.

FIGS. 2 and 6 are schematic cross-sectional views of conventional multilayer wiring boards, respectively. , In FIG. 2, numerals 1 and 4 are laminated ceramic substrates,
2 means a wiring conductor, and 3 means a through hole. Also the third
In the figure, reference numeral 5 indicates an insulating resin layer, 6 indicates a ceramic substrate, 7 and 9 indicate wiring conductors, 8 indicates a through hole, and 10 indicates a conductive hole.

The conventional multilayer wiring board shown in FIG. 2 is one in which ceramic plates are laminated in multiple layers, and a high-melting point metal-based conductor wiring layer is formed in the gaps between them.

The structure shown in FIG. 3 is multilayered by stacking a conductor wiring layer and the above-mentioned insulating layer on a ceramic substrate by using an insulating paste or the like that can be solidified by a method such as firing as an insulating layer.

In the former structure, when the ceramic plate is in a green sheet state before firing, a conductive paste made of high-melting point metal scraps such as molybdenum or tungsten is printed on the surface in the form of a wiring pattern, and each layer is aligned. A manufacturing method is used in which the material is piled up and simultaneously baked to solidify it. However, since work that requires high flK, such as printing and positioning the conductor pattern, is performed in the green state, the dimensional errors that appear after firing and solidification are large, and the minimum achievable size of the conductor pattern is at most The grid spacing is about 100 μm and 500 μm. Furthermore, since the conductor layer and the ceramic plate are formed at the same time by firing at °C, it is necessary to use a high melting point total bending material with low reactivity even at high temperatures as the material for the conductor m. It had the disadvantage of being inferior to copper and silver in terms of electrical conductivity.

In the latter case, it is possible to use a ceramic material or an organic polymer material as the insulating layer, so there are no particular restrictions on the material for the conductor layer, and a line width of 30 μm and a lattice spacing of 200 to 300 μm may also be used. It is possible.

However, in the latter case, when insulating layers are stacked on a ceramic substrate, there will be a difference in thermal expansion and contraction between the ceramic substrate and the insulating layer, which will cause warping and interlayer delamination, making it difficult to increase the number of layers. This is a big bottleneck.

Therefore, there are restrictions on the thickness ratio and materials of the ceramic substrate and the insulating layer.

[Purpose of the invention]

The purpose of Yumei Moto is to provide a high-density multilayer wiring board that solves the above-mentioned problems.

[Summary of the invention]

To summarize the present invention, the present invention relates to a multilayer wiring board, in which an insulating layer in a multilayer wiring layer having conductive patterns and insulating layers alternately is a layer containing an organic polymer as an essential component, and The structure is characterized by the multi-layer wiring structure, which has excellent heat resistance and heat dissipation properties, and has a small coefficient of thermal expansion on both sides of the substrate.

The structure of the present invention solves the problems of low thermal expansion and warping of multilayer wiring layers.

It has also been found that by using an organic polymer reinforced with inorganic or organic fibers as the insulating layer, it is possible to further reduce the thermal expansion of the multilayer wiring layer.

In the present invention, there are various known substrates that have excellent heat resistance and heat dissipation properties and a low coefficient of thermal expansion, such as ceramics and conductive materials. Among them, the use of ceramic substrates in particular achieves low thermal expansion. It was also confirmed that the manufacturing process was simple and had a great effect on reducing warpage.

In order to manufacture the multilayer wiring board of the present invention, a large number of prepreg sheets made of inorganic fibers coated with semi-cured resin are used, such as double-sided wiring boards with conductor wiring formed on the top and bottom of a resin board reinforced with inorganic fibers. At the same time, they are bonded under heat and pressure to form a multilayer structure.

At this time, the resin of the adhesive layer is polymerized and hardened by heating.

Next, in order to establish electrical conductivity between the conductors in each layer, holes 1' are formed using a micro-drill or a laser, and through-hole conductors are formed by metal plating or metal vapor deposition. Furthermore, the multilayer wiring layered ceramic substrate is integrally bonded to the top and bottom of the multilayer wiring layered ceramic substrate via the prepreg sheet. At this time, the multilayer wiring layers on the top and bottom of the ceramic substrate may function independently, or if a connection between the top and bottom is required, the ceramic substrate is pre-drilled at the connection part and the inside of the hole is treated to be conductive. It may be connected directly to the upper and lower wiring layers, or it may be made electrically conductive by drilling a hole in the connection portion after integration.

Furthermore, the wiring layers above and below the ceramic substrate do not necessarily have to be the same, and can be selected depending on their functions. However, it is preferable that the thicknesses of the upper and lower multilayer wiring layers be the same as possible. The present invention also has the effect of having a different thickness ratio in degrees Celsius, but it is better to select it within the range of 6:1 to 1:3.

Further, the total thickness of the multilayer wiring layer and the thickness of the ceramic soldered substrate can be freely selected depending on the required coefficient of thermal expansion.

In order to manufacture a multilayer wiring board according to the present invention, a method is used in which insulating layers and arrangement layers are successively laminated one layer at a time on the top and bottom of a ceramic substrate, instead of the method of integrally adhering it to both sides of the board. The effect may be achieved similarly.

In the case of the high-density distribution board of this 96-year-old, the dimensional compaction rate during multilayer bonding is at most about 0.02 to 0.06 inches, compared to 12 to 14 inches using the conventional ceramic green sheet method. Because it is extremely small, the positioning accuracy when multilayering is greatly improved.
It becomes possible to use up to 5 pieces. Since the heating temperature during multilayer adhesion can be 500° C. or lower, a metal with good isoelectricity such as 114 can be used as the i-polymetal. Furthermore, since the dielectric constant of the insulation layer is much lower than that of the ceramic substrate, it is advantageous in terms of calculation speed.

Generally, in the case of a multilayer board using inorganic fiber as a reinforcing material, the coefficient of thermal expansion in the plane direction is 9 to 12X10-'wa/+m
/℃ and 4×10-6■/ for a normal LSI chip
sa/ It's a dog compared to CK. For this reason, when an LSI chip is directly mounted on a multilayer board using inorganic fibers as a reinforcing material, sufficient connection reliability between the LSI and the board cannot be obtained due to the difference in thermal expansion during heat cycles. Therefore, in the present invention, we have developed not only a material using inorganic fiber as a reinforcing material, but also a multilayer substrate made of an organic polymer, which is laminated on both sides of a ceramic substrate with a small coefficient of thermal expansion. It has been found that since the ratio is small and there is no warpage, it becomes possible to directly mount the LSI chip on the surface K, for example, the CCBK, and the reliability of the connection between the LSI chip and the multilayer board is greatly improved.

The organic fiber 1 in the present invention is polyaramid fiber, and the inorganic fiber is SiO2, A/40s.

E-glass, C-glass, A-glass, etc.
There are various types of glass fibers such as S-glass, D-glass, YM-51-A-glass, and Q-glass using quartz.

Blending or combining organic fibers and inorganic fibers is also effective.

As the resin, a thermosetting resin such as a normal epoxy resin or a phenolic iA resin can be used, but preferably an addition polymerization type polyimide resin, a dehydrated rice paddy polyimide resin, or a cyanate addition polymerization type resin. For example, when a heat-resistant resin made from isocyanate, cyanide ester, aromatic cyanamide, etc. is used as a base material for LSI,
It is advantageous in terms of heat resistance.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in more detail using the embodiment ν14, but the present invention is not limited to the embodiment.

Embodiment 1 Embodiment a1 of the present invention] will be described based on the attached FIG. 1. That is, FIG. 1 is a schematic cross-sectional view of one example of the multilayer wiring board of the present invention. In FIG. 1, reference numeral 11 is an inorganic fiber reinforced resin substrate, 12 is an inorganic fiber reinforced adhesive layer, 13 is a ceramic substrate, 14 and 15 are wiring conductors, 16 is a through hole, 17 is a conductive hole, and 18 is an adhesive. means.

First, 110 double-sided copper-clad laminates (100μ thick) are made by laminating copper foil with a thickness of 9μ on both sides of an additive polyimide resin plate using Q-glass fiber as a reinforcing material. A 15-ft circuit was formed using the method, and four double-sided boards each having conductor layers such as signal return, electric current, matching layers, etc. were fabricated. Next, four double-sided wiring boards of each layer were bonded together at 180°C through an adhesive layer 12 made by synthesizing the semi-cured polyimide 1'Q-glass fiber cloth.
, and 60 minutes under heat and pressure of 30 kgf/cm2 to form a multilayer adhesive, thereby creating two types of multilayer boards. Note that multilayer adhesion was performed using a method using a nodular pin to prevent positional shift. Thereafter, holes were drilled using a micro drill, and the entire surface was plated with chemical steel to form through-hole conductors 16. Two multilayer wiring boards were fabricated by forming missing traps and outermost layer circuits by etching.

Next, the thickness is 3 mm ci) SiC, Jt! Drill a hole in the m plate 15 at a predetermined position using a cOt gas laser device,
Make Omukai conductive17 by chemical copper plating. Additive polyimide adhesive 18 is applied by screen printing to the areas other than the top and bottom of the conductive hole, and after removing the solvent, solder balls are placed on the top and bottom of the conductive hole. Thereafter, they were stacked on top and bottom of the above-described high-density multilayer wiring board ftSiC substrate and bonded under heat and pressure of 10 kgf/2 for 120 minutes at 220°C. Note that this adhesion is performed through the through hole 16.
This was done by using a guide pin so that the conductive hole 17 on which the solder ball of the SiC substrate was placed overlapped.

The warpage of the multilayer wiring board created according to this example is 100+
The thickness was 50 to 40μ at the w+ angle, which was significantly reduced compared to the 70 to 90μ of a board made by laminating the same multilayer wiring board as above on one side of SiC.

In addition, the dimensional change during multilayer adhesion is 0.02 to 0.03.
%, and the conventional ceramic green sheet method is 12~
Since it was significantly reduced compared to 14%, it became possible to bond fine patterns together, and it became possible to increase the wiring density per plane by more than four times.

Next, a 10-head square LSI chip g is placed on the high-density wiring board.
After mounting by the ccB method and performing 1,000 heat cycle tests of -65° C. to +150° C. for 2 hours per cycle, the connection reliability between the board and the LSI chip was evaluated, and no abnormality was observed.

Furthermore, when polyaramid fiber is used instead of Q-glass fiber as the reinforcing fiber of the multilayer board described above, according to the present invention, the warpage is 100 to 150 μm per 100 simple squares when a multilayer wiring board is laminated on one side of SiC. When laminated on both sides of SiC, it was confirmed that the warpage reduction effect of the present invention is 30 to 40 μm per 100 angles, which is large.

〔Effect of the invention〕

As explained above, the multilayer wiring board 1 of the present invention not only achieves low thermal expansion but also significantly reduces warping compared to conventional ones, so it is said to be useful for various applications. A remarkable effect was achieved.

[Brief explanation of drawings]

FIG. 1 is a schematic cross-sectional view of one example of a multilayer wiring board according to the present invention, and FIGS. 2 and 3 are schematic cross-sectional views of a conventional multilayer wiring board. 1 and 4 two-layer ceramic substrate, 2.7.9.14 and 15: 6 wiring bodies, 6.8 and 16: through hole, 5:
Insulating resin JΔ, 6 and 16: Ceramic substrate, 11: Inorganic fiber reinforced resin substrate, 12: Inorganic fiber reinforced adhesive layer, 10
and 17: 4 through holes, 18: adhesive

Claims (1)

[Claims] 1. The insulating layer in the multilayer wiring layer having conductive patterns and insulating layers alternately is a layer containing an organic polymer as an essential component, and the multilayer wiring layer, heat resistance and heat dissipation A multilayer wiring board characterized by having a structure on both sides of the board that has excellent properties and a low coefficient of thermal expansion. 2. The multilayer wiring board according to claim 1, wherein the insulating layer is an organic polymer reinforced with inorganic or organic fibers. 3. The multilayer wiring board according to claim 1 or 2, wherein the substrate having excellent heat resistance and heat dissipation properties and a small coefficient of thermal expansion is a ceramic substrate.