JPS61805A - Control computer - Google Patents

Abstract

PURPOSE:To detect easily a fault of a data line by latching ''H'' when both the data line and the 1st strobe line are shifted at a time and then latching ''L'' when both the data line and the 2nd strobe line are shifted at a time. CONSTITUTION:A computer 1 delivers strobes S and R together with data. In a figure A the coincidence is secured between the ''L'' periods between the data and the strobe S. Thus ''L'' is supplied to the set input -S of an R-S FF3 from the output of a negative logical AND4, and ''H'' emerges at an output Q. While in a figure B the coincidence is obtained between the ''L'' periods of the data and the strobe R. Thus ''L'' is applied to the reset input R of an R-S FF3 from the output of a negative logical AND5, and ''L'' emerges at the output Q. Thus it is possible to detect a fault where the data line or the strobe line is fixed at ''H'' or ''L'' by monitoring periodically the shifts of both the data and strobe lines.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] This invention relates to a computer for controlling industrial processes.

[Conventional technology]

Figure 1, for example, was published by Ohmsha (March 20, 1981).
It is a block diagram showing the output method of the conventional control computer described in "I/O control and system configuration" of
FIG. 2 is a timing chart of its operation. In FIG. 1, (1) is a calculator, and (2) is a D-flip 70g.

It is assumed that the computer (1) outputs the control command IK' or lLl based on the calculation result.

The computer (1) outputs data corresponding to the control command to the data controller of the D flip-flop (2). Next, a strobe pulse having the waveform shown in FIG. 2 is output to the clock C of the D free lag flop. D flip frog (2)
operates to cause the immediately preceding data input signal to appear on the output Q when the clock input C transitions from lLI to lHl. Therefore, the data output by the computer (1) is output as a control command.

Figure 2 is a timing diagram showing the operation of the conventional control computer output method, where A is when outputting ILI, B is 'H1
This is the case when outputting . In either case, when the strobe pulse transitions from ILI to lHl, the data immediately before that transition is made valid.

Note that the shaded area indicates that any value can be taken.

That is, before and after the time when the strobe transitions from ILI to 'H1, data valid as an output is supplied to the data output of the D flip-flop (2) for a limited period of time, but at any time other than the above time, Data is supplied.

Since the output method of the conventional control computer is configured as described above, the data line of the computer (1) is IH't or I
If a failure occurs that causes Ll to become stuck, an incorrect control command will be output. Also, even if noise gets into the strobe line, if the data is not valid,
There was a risk that arbitrary data would be latched and an incorrect control command would be output.

[Summary of the invention]

This invention was made to eliminate the drawbacks of the conventional ones as described above, and the computer (1) temporarily transitions the logic level of the data line and the first and second strobe lines every time it outputs an output. When the data line and the first strobe line transition occur at the same time, lH is latched, and when the data line and the second strobe line transition occur at the same time, lLl is latched. The present invention provides a control computer that allows line failures to be easily discovered and has an output method with excellent noise resistance.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. Third
In the figure (3) is R-S flip 70 tube, i4)
, (5) is of the negative logic layer.

#t-calculator (1) outputs strobe S and strobe R along with data. FIG. 4 shows the timing of these operations.

FIG. 4A shows the timing when outputting IH'. Since the data ILI period and the strobe S ILl period match, the output of the negative logic AND (4) is transferred to the R-S flip-flop ( 3) Human power g'Ll
is input and IHI appears at output Q.

FIG. 4B shows the timing when ILI is output. Since the data ILI period and the strobe R ILI period match, the output of the negative logic AND (5) is transferred to the R-S flip-flop (3). ) to reset manually
I is input and ILI appears at output Q.

〔Effect of the invention〕

As described above, according to the present invention, the computer (1) outputs the strobe S and strobe R together with the data that transitions each time it is output, and when the transition times of the data and strobe S match, the computer (1) latches or latches IHI. Since the configuration is such that ILI is latched when the data and strobe R transition times match, the data line is or the strobe line is lHl or I
It is possible to detect nine failures by sticking to the LI.

Furthermore, even if noise is mixed into the strobe, the output of the R-8 flip-flop will not change unless the data is transitioning at that time.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an output device of a conventional control computer, FIG. 2 is an operation timing diagram thereof, FIG. 3 is a block diagram showing an output device of a control computer according to an embodiment of the present invention, and FIG. The figure is an operation timing diagram. (1) Calculator, (3) Latch, (4) AND, (
5) ANDIn addition, the same symbols in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] (1) When the computer outputs a binary control command to the process via the latch based on the calculation result, the computer outputs data and the first and second strobes,
A first AND that detects that the data and the first strobe transition occur at the same time, a second AND that detects that the data and the second strobe transition occur at the same time, and the first AND The data of the first value with the significant output of A
A control computer comprising a latch that latches data of a second value with a significant output of an ND, and identifying the value of the data to be output based on the time at which the data and the first and second strobes transition.