JPS6179900U - - Google Patents
Info
- Publication number
- JPS6179900U JPS6179900U JP16322884U JP16322884U JPS6179900U JP S6179900 U JPS6179900 U JP S6179900U JP 16322884 U JP16322884 U JP 16322884U JP 16322884 U JP16322884 U JP 16322884U JP S6179900 U JPS6179900 U JP S6179900U
- Authority
- JP
- Japan
- Prior art keywords
- inverter
- transfer gate
- input terminal
- output terminal
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Shift Register Type Memory (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16322884U JPS6179900U (en:Method) | 1984-10-29 | 1984-10-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16322884U JPS6179900U (en:Method) | 1984-10-29 | 1984-10-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6179900U true JPS6179900U (en:Method) | 1986-05-28 |
Family
ID=30721087
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16322884U Pending JPS6179900U (en:Method) | 1984-10-29 | 1984-10-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6179900U (en:Method) |
-
1984
- 1984-10-29 JP JP16322884U patent/JPS6179900U/ja active Pending
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