JPS6177405A - Bias circuit for field effect transistor - Google Patents

Abstract

PURPOSE:To keep the potential difference between a drain and a source and a drain current constant even if a DC parameter of an FET is in variation by using an operational amplifier. CONSTITUTION:When a DC parameter is changed and a drain current is decreased, a voltage drop across a register 5 is decreased. The potential difference between the drain and source of the FET1 is increased and a difference with a reference potential difference is caused to an operational amplifier 10. The absolute value of an output voltage of an amplifier 10 is decreased accordingly and the potential difference between the gate and source of the FET1 is decreased. As a result, the drain current is increased, the voltage drop of the resistor 5 is also increased and the potential difference between the drain and source of the FET1 restores to the potential difference equal to the reference potential difference. Through the process above, the drain current of the FET1, that is, the potential difference between the drain and source is kept constant.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a bias circuit for a field effect transistor, and in particular, even when a DC parameter fluctuates for some reason, the bias circuit between the drain and source of a field effect transistor can be maintained. This invention relates to a bias circuit that has been improved so that the potential difference and drain current can be automatically held constant using an operational amplifier.

[Conventional technology]

FIG. 2 shows a conventional example of a bias circuit that supplies a DC bias to a field effect transistor whose drain is grounded. This field effect transistor bias circuit connects the intermediate terminal of the variable resistor 2 and the gate electrode of the field effect transistor 1. The source electrode of the field effect transistor 1 is connected via a resistor 3 to a negative power supply. Further, one end of the variable resistor 2 is grounded, and the other end is connected to the same negative power source as the power source to which the resistor 3 is connected. By changing the position of the intermediate terminal of the variable resistor 2 in this way, the potential difference between the gate and the north is changed to obtain a predetermined drain current and a predetermined potential difference between the drain and source.

[Problem that the invention seeks to solve]

By the way, in this configuration, when the field effect transistor l is replaced, it becomes necessary to adjust the position of the intermediate terminal of the variable resistor 2, and since the reliability of the variable resistor 2 is low, it is not necessary to use it as a bias circuit. There is also the problem of low reliability.

An object of the present invention is to provide a more stable bias circuit for a field effect transistor by automatically supplying a constant drain current and potential difference between the drain and source to the field effect transistor.

[Failure to solve the problem]

In order to achieve the above object, a bias circuit for a field effect transistor according to the present invention uses an operational amplifier to detect changes in the drain current and potential difference between the drain and source of the field effect transistor due to fluctuations in DC parameters. Detected.

It is configured to operate in a direction that compensates for this.

According to the above configuration, it is possible to automatically maintain the drain-source potential difference and the drain current constant, and furthermore, by increasing the amplification degree of the operational amplifier, the bias condition can be changed due to changes in DC parameters. can be suppressed to a smaller value, and the two objectives of the present invention can be reliably achieved.

〔Example〕

The present invention will be explained in more detail below with reference to one drawing.

FIG. 1 is a diagram showing an embodiment of the present invention.

In this circuit, the output electrode of the operational amplifier 10 is connected to the gate electrode of the field effect transistor 1, and is also connected to the inverting input electrode of the operational amplifier 10 via the resistor 4.

The x-sumi pole of the field effect transistor l is connected via a resistor 5 to the negative electrode of the power supply. Operational amplifier 100 inverting inverting input electrode non-inverting input electrode through resistor 6 and series connected resistor 7 and resistor 8, respectively.

It is connected to the connection point between the north electrode of the field effect transistor 10 and the resistor 5 and to the negative electrode of the power source.

In addition, the connection point between the resistor 7 and the resistor 8 is grounded via the resistor 9. In this way, the drain current of the field effect transistor 1 and the drain When the potential difference between the sources changes, the change is detected and the device operates to compensate for the change.

The resistor 5 is connected to the drain when a predetermined tunnel current flows.
The resistance value is determined so that the potential difference between the sources becomes a predetermined potential difference. Resistor 8.9 is an operational amplifier] ・i? of the reference applied to the non-inverting input electrode of 0? J (determines the ffl difference, and is set to be equal to the 1z difference between the drain and source. Also, resistor 4.6.7 is a resistor for operating the operational amplifier with a predetermined gain. The gain of the operational amplifier 10 is determined by the ratio of the resistance value of the resistor 4 to that of the resistor 6.

Now, suppose that the DC parameters change for some reason and the drain current decreases. This reduction in drain current reduces the voltage drop across resistor 5.

A difference is generated between the potential difference between the drain and source of the field effect transistor 1 (not shown) and the reference potential difference applied to the non-inverting input electrode of the operational amplifier 10. Correspondingly, the absolute value of the output voltage of the operational amplifier 10 constituting the 1-inverting amplifier decreases, and the potential difference between the gate and north of the field effect transistor 1 decreases. As a result, the drain current of field effect transistor 1 increases.

The voltage drop across the resistor 5 also increases, and the potential difference between the drain and source of the field effect transistor 1 returns to a potential difference equal to the reference potential difference.

Through the above process, the drain current of the field effect transistor 1, and thus the potential difference between the drain and the source, can be increased to a constant value.

〔Effect of the invention〕

As explained above, according to the present invention, the present invention can be applied even when a field effect transistor is replaced or when the DC parameters of the field effect transistor are changed.

It is possible to automatically keep the drain current and the potential difference between the drain and source constant with an accuracy proportional to the gain of the operational amplifier.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a bias circuit for a field effect transistor according to the present invention, and FIG. 2 is a circuit diagram of a conventional bias circuit. In the figure, 1... field effect transistor. 10... operational amplifier. Figure 1 Voice Figure 2

Claims (1)

[Claims] 1. In a DC bias circuit where the field effect transistor 1 is used as a negative power supply with its drain grounded in a DC manner, the output electrode of the operational amplifier 10 is connected to the field effect transistor 1.
and the inverting input electrode of the operational amplifier 10 through a resistor 4, and the source electrode of the field effect transistor 1 is connected through a resistor 5 to the negative electrode of the power supply. The inverting input electrode and the non-inverting input electrode of are connected to the connection point between the source electrode of the field effect transistor 1 and the resistor 5 and the negative voltage of the power supply through a resistor 6 and resistors 7 and 8 connected in series with each other, respectively. The circuit includes a circuit connected to the electrode and further grounded through a resistor 9 at the connection point between the resistors 7 and 8, and the drain current of the field effect transistor 1 and between the drain and source are 1. A bias circuit for a field-effect transistor, characterized in that when the potential difference changes, the bias circuit is configured to detect the change and operate in a direction to compensate for the change.