JPH02116203A - Temperature compensation type active bias amplifier - Google Patents

Abstract

PURPOSE:To constantly keep a gain without depending on the temperature by connecting in parallel two thermisters to a positive phase input terminal, connecting other edge of one thermister to a negative power source terminal, and connecting an operational amplifier in which other edge of one more thermister is grounded, to a base terminal for an active bias. CONSTITUTION:An operational amplifier 12 is connected to the base terminal of a transistor 4 for an active bias, two thermisters 13 and 22 are connected in parallel to the positive phase input terminal of the operational amplifier 12, a negative power source terminal 6 is connected to other edge of one thermister 22 and other edge of one more thermister 13 is grounded. The operational amplifier 12, accompanying the change of a resistance value due to the temperature of two thermisters 13 and 22 connected in parallel to a positive phase input terminal 5, changes the base voltage of the transistor 4 and changes the drain current of an FFT 1. Thus, the operational amplifier 12 is operated to keep constantly the signal gain of an amplifying circuit composed of the FFT 1 without depending on the change of the temperature.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an amplifier using field effect transistors and equipped with a temperature compensation circuit.

[Conventional technology]

Conventionally, in amplifiers using field effect transistors (hereinafter referred to as FETs), in order to prevent deterioration of the signal amplification function due to changes in the DC bias characteristics of the ET over time,
An active bias amplifier using a transistor in a DC bias circuit is known.

FIG. 2 is a diagram illustrating an embodiment of an active bias amplifier connected to -.

(1) is FET, (Ia), (lb), (
lc) are gate terminals with F l>1'(1), respectively;
Drain terminal, source terminal, (2) is gate terminal (1a
), (3) is the signal input terminal connected to the drain terminal (1
b) a signal output terminal connected to (4) a transistor;
(4a), (4h), and (4c) are the base terminal, collector terminal, and emitter terminal of the transistor (4), respectively, (5) is the positive power supply terminal, (6) is the negative power supply terminal, and (7)
is the first resistor that applies a DC potential to the emitter terminal (4c) of the transistor (4), (8) is the transistor (4)
A second resistor (9) provides a DC potential to the collector terminal (4b) of the FY-T (1), and a third resistor (9) provides a DC potential to the gate terminal (1a) of the FY-T (1) together with the second resistor (8).
(10) and (11) are fourth and fifth resistors for applying a DC potential to the base terminal (4a) of the transistor (4).

Next, the operation will be explained. The source terminal (1c) of the FET (1) is grounded, the gate terminal (1a) is given a negative voltage via the second resistor (8), and the drain terminal (
1b) is given a positive voltage via the emitter terminal (4c) of the transistor (4). The signal amplification function, that is, the gain of F E T (1) is determined by the bias voltages of the gate terminal (1a) and drain terminal (1b). At this time, the signal input from the signal input terminal (2) is amplified by the FE"F(+), and the signal input from the signal output terminal (3) is amplified by the FE"F(+).
) is output.

Next, the active bias function of the transistor (4) will be explained. Base terminal (4a) of transistor (4)
) is applied with a voltage VB determined by dividing the voltage supplied from the positive power supply terminal (5) by the fourth resistor (JO) and the fifth resistor (JO). At this time, the voltage VIE of the emitter terminal (4c) is determined by the base voltage VB and the base-emitter potential difference VBE, and due to the active operation of the transistor, V H = V B + V BE, where VBE is a value specific to the transistor. , transistor (
4) is always kept at a constant value when driven by an appropriate bias voltage. Therefore, when the base voltage VB is a constant value, the emitter voltage VI+ is also a constant value.

-I- As mentioned above, the emitter voltage VB is a constant value.

Potential difference between the positive power supply terminal (5) and the emitter terminal (4c).

That is, the voltage VRI between the terminals of the first resistor (7) is always kept at a constant value, and the current flowing through the first resistor (7) is also kept at a constant value. Is this IRI 1? E 'I' (+)
Since the current is divided into the drain current ID of the transistor (4) and the emitter current I++ of the transistor (4), the emitter current IB flows so as to keep IE=IRI-10 at a constant value in response to changes in the drain current ID.

On the other hand, in proportion to the emitter current IH,
) The voltage VC at the gate terminal (1a) is determined by the potential difference generated when the collector current IC flows through the second resistor (8) and the third resistor (9). Negative power terminal (
Since the terminal voltage of 6) is constant, the gate voltage VG decreases as the collector current IC increases, and increases in the negative voltage direction as the IC decreases.

However, the drain current ID of F ET (]) is determined by the gate voltage VG. That is, when the gate voltage vG decreases, the drain current increases, and conversely, when the gate voltage VG increases in the negative voltage direction, the drain current decreases.

Therefore, when the drain current ID of FET (1) decreases, the emitter current of transistor (4) increases, and the collector current 1c increases in proportion to this, and as a result, the FET
The gate voltage VG of (I) decreases, causing the drain current ID to increase. Conversely, when the drain current ID increases, the gate voltage vG increases, causing the drain current ID to decrease. In this way, the transistor (4) and the first to fifth resistors (7) to (11) are connected to the F through the transistor (4).
By applying negative feedback to E T (1), FET
(1) Drain current! A constant current bias circuit is configured to keep D at a constant value.

Using an example, it will be explained that this active bias amplifier functions to maintain the drain current ID at a constant value even as the DC bias characteristics of the FET (1) change over time. FIG. 7 is a characteristic diagram showing the relationship between the gate voltage vG and drain current ID of F E T (J).

In FIG. 7, a solid line A represents the initial bias characteristic, and a point P represents the initial bias point. This F E T (+)i,
When a 1 m aging occurs and the bias characteristic changes as shown by the broken line B, the bias point moves to Q with the same gate voltage VGO, the drain current 100 changes like IDI, and the gain also changes. However, in an active bias amplifier, the gate voltage changes to VGI so as to keep the drain current at a constant value, that is, the bias point moves from P to R. Therefore, even if the DC bias characteristics of the FET change over time, the active bias function prevents the gain from deteriorating.

[Problem to be solved by the invention]

Since the conventional active bias amplifier is configured as shown below, it operates to keep the drain current constant even when the temperature characteristics change as well as the aging of the FET. However, since FETs have the characteristic that the gain changes with temperature even with the same drain current, conventional active bias circuits have had the problem of large gain changes with temperature.

This invention was made to solve the above problems, and its purpose is to obtain an active bias amplifier having a temperature compensation function.

[Means to solve the problem]

In the temperature compensated active bias amplifier according to the present invention, an operational amplifier is connected to the base terminal of an active bias transistor, two thermistors are connected in parallel to the positive phase input terminal of the operational amplifier, and the other end of one thermistor is connected to the negative terminal. In addition to connecting the power supply terminal, the other end of another thermistor is grounded.

[Effect]

The operational amplifier in this invention has a positive phase input terminal with 112
The base voltage of the transistor is changed according to the change in resistance value due to temperature of the two thermistors connected in the column, and F
Change the drain current of ET. As a result, the operational amplifier acts to keep the signal gain of the amplifier circuit constituted by the FET constant regardless of changes in temperature.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (I) is F E T , (la), (
Ill) (1c) are the gate terminal - jζ drain terminal and source terminal of FET (1), respectively, (2) is the signal input terminal connected to the gate terminal (1a), and (3) is the drain terminal (Ib). The signal output terminals to be connected, (4) are transistors, (4a), (b).

(4c) are the base terminal, collector terminal, and emitter terminal of transistor 4), (5) is the positive power supply terminal,
(6) is the negative power supply terminal, (7) is the first resistor that applies a DC potential to the emitter terminal (4c) of the transistor (4), (
8) is the second resistor that applies a DC potential to the collector terminal (4b) of the transistor (4), and (9) is the second resistor (8).
and a third resistor for applying a DC potential to the gate terminal (1a) of FET (J), and (10) and (11) a fourth resistor for applying a DC potential to the base terminal (4a) of the transistor (4). and the fifth resistor, (12) is an operational amplifier, (12a) to (+2a) are respectively the negative phase input terminal, positive phase input terminal, output terminal, positive bias terminal, and negative bias terminal 2 (3) of the operational amplifier. is a thermistor, (
+4) and (15) are sixth and seventh resistors that apply a DC potential to the positive phase input terminal (12b) of the operational amplifier (12) together with the thermistor (13).

(16) and (17) are the eighth and ninth resistors for dividing the voltage applied from the negative power supply terminal (6);
8) is the eighth resistor (16) and the voltage divided by the eighth resistor is connected to the negative phase input terminal (] of the operational amplifier (12).
2a), the 11th resistor (19) is the 11th resistor for applying feedback from the output terminal (+2c) of the operational amplifier (12) to the negative phase small input terminal (+2a), (
20) is the twelfth resistor that provides a positive potential to drive the operational amplifier (12), and (21,) is the operational amplifier (12).
12) The first
3, (22) is a thermistor, (23) and (24) are 14th and 15th resistors that provide DC potential to the positive phase input terminal (12b) of the operational amplifier (12) together with the thermistor (22). be.

Next, an example will be described. In this example, FE
The source terminal (1c) of T(+) is grounded, the gate terminal (1a) is given a negative voltage via the second and third resistors (8) and (9), and the drain terminal (1b) is grounded. It is the same as a conventional active bias amplifier in that a positive voltage is supplied through the emitter terminal (4c) of the transistor (4). Also, the gain of F E′I” (+) is determined by the bias voltage of the gate terminal (Ia) and drain terminal (Ib), and the signal input from the signal input terminal (2) is F E T (1) It is the same as a conventional active bias amplifier in that it is amplified by It is also the same as a conventional active bias amplifier in that it forms a constant DC bias circuit that maintains the drain current ID of FET (+) at a constant value by applying negative feedback to F E '(1) through (4). However, in this temperature compensated active bias amplifier, the operational amplifier (+2) whose output terminal (12c) is connected to the base terminal (4a) of the transistor (4), and the operational amplifier (12
Temperature compensation of the gain can be performed by the thermistor (13) and thermistor (22) connected in parallel to the positive and negative phase input terminals (12b) of ). The operational amplifier (12) has a positive bias applied to the positive bias terminal (12d) from the positive power supply terminal (5) via the twelfth resistor (20), and a positive bias is applied to the positive bias terminal (12d) from the negative power supply terminal (6) through the twelfth resistor (20). When a negative bias is applied to the negative bias terminal (12e) through the negative bias terminal (12e) and the appropriate operating state is set, one end is connected to the negative phase input terminal (12e).
2a), the voltage generated at the other end of the tenth resistor (18) (hereinafter referred to as reference lens voltage V Ref),
A voltage vop is generated at the output terminal (12c) according to the potential difference with the voltage V0 at the positive phase input terminal (12b).

FIG. 3 is a diagram showing the temperature characteristics of the input/output voltage of the operational amplifier (12) and the reference voltage V Ref. Straight line C shows the reference voltage V Rer, and this voltage value connects the negative power supply voltage to the eighth resistor (16) and the ninth resistor (
17), it is a constant value regardless of temperature. On the other hand, the positive phase input terminal voltage V+ is connected to the negative power supply voltage by the positive characteristic thermistor (13) whose resistance value increases in proportion to the temperature, the sixth and seventh resistors (14) and (15), and the positive characteristic thermistor (22). ) and 14th
and the fifteenth resistor (23) and (24).

At this time, the operational amplifier (12) is set so that the voltage value changes depending on the temperature, the reference voltage V Ref
Potential difference between and positive phase input terminal voltage → (V+V Rer)
is operated to amplify with an amplification factor determined by the ratio of the first O resistor (18) and the eleventh resistor (19), and an amplified voltage VOP is generated at the output terminal (12c). Therefore, this output voltage OP is set to vary greatly due to slight temperature fluctuations in the positive phase input terminal voltage XX, as shown by the straight line Δ in FIG. Two thermistors (13) and (2
Since the resistance value of 2) changes in the same direction due to temperature fluctuation, the positive phase input terminal voltage can be set more accurately.

When the output terminal voltage VOP is set to increase on the low temperature side as shown by the straight line in FIG. 3, the base voltage VB of the transistor (4) has a temperature characteristic as shown by the straight line A in FIG. 4.

In other words, in a conventional active bias amplifier that does not have a temperature compensation function, the value is constant regardless of temperature, as shown by straight line B.

This temperature compensated active bias amplifier uses low temperature (II
) side, the base voltage VB increases. When the base voltage VB increases, the emitter voltage VE also becomes VB = VB + VBE
(VBE is constant), so the first resistance (7
) decreases, and the current flowing through the first resistor (7) decreases. Therefore, the drain current ID, which is a branch of the current flowing through the first resistor (7), also decreases.

On the other hand, when base voltage VB decreases, drain current ID increases. Therefore, in the conventional active bias amplifier, the drain current ID is constant regardless of the temperature, as shown by the straight line B in FIG.

In this temperature-compensated active bias amplifier, the drain current ID is set to increase as the temperature rises, as shown by the straight line A in FIG. 5, in response to changes in the base voltage VB due to temperature. On the other hand, focusing on the relationship between drain current ID and gain G, in a conventional active bias amplifier, when the drain current is constant, the gain G decreases as the temperature rises, as shown by straight line B in Figure 6. It had similar temperature characteristics. However, in this temperature-compensated active bias amplifier, the gain is set to increase as the temperature rises, taking advantage of the characteristic that the gain is proportional to the drain current ID, as shown by straight line A in Figure 5. . In other words, as shown by straight line A in Figure 6, by decreasing the drain current on the low temperature side with respect to room temperature, the gain that has increased from room temperature in the case of no compensation is reduced, and the drain current on the high temperature side is reduced. By increasing the gain, the gain is increased. As a result 2, according to the present invention, the function of the conventional active bias amplifier of suppressing gain fluctuations due to changes in the DC characteristics of the FET over time is preserved, and the gain is maintained at a constant value regardless of temperature fluctuations. A stable and highly reliable temperature-compensated active bias amplifier with functions can be obtained.

In the above embodiment, the operational amplifier (12) controls the base voltage VB of a single transistor (4), but the operational amplifier (12) controls the base voltage VB.
There may be a plurality of transistors (4) whose B is controlled.

〔Effect of the invention〕

As shown in I- below, according to the present invention, two terminals are connected to the multiple phase input terminal.
Two thermistors are connected in parallel, the other end of one thermistor is connected to the negative power supply terminal, and the other end of the thermistor is connected to the grounded operational amplifier to the earth terminal for active bias. This has the effect of providing a stable and highly reliable temperature-compensated active bias amplifier having a temperature-compensating function that keeps the gain constant regardless of temperature.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a temperature compensated active bias amplifier according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a conventional active bias amplifier, FIG. 3 is a temperature characteristic diagram of input/output voltage of an operational amplifier, and FIG. Figure 4 shows the temperature characteristics of Heas voltage.
FIG. 5 is a drain current temperature characteristic diagram, FIG. 6 is a gain temperature characteristic diagram, and FIG. 7 is an FET gate voltage-drain current characteristic diagram. In Figures 1 and 2, (1) is an FET, (2)
is a signal input terminal, (3) is a signal output terminal, (4) is a transistor, (5) is a positive power supply terminal, (6) is a negative power supply FJ:
(7) to (11) are the first to fifth resistors, (+2
) is an operational amplifier, (+3) is a minus mister, (14)
- (21) are the 6th to 13th resistors (22) are thermistors, (23) and (2a) are the 14th and 15th resistors. Note that in the two figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] An active bias amplifier having a field effect transistor and a transistor having a collector terminal connected to a gate terminal of the field effect transistor and an emitter terminal connected to a drain terminal of the field effect transistor,
an operational amplifier whose output terminal is connected to the base terminal of the transistor; a thermistor connected between the positive phase input terminal and the negative power supply terminal of the operational amplifier; and one end connected to the positive phase input terminal of the operational amplifier. and another thermistor whose one end is grounded.