JPS6175609A - Power amplifier circuit - Google Patents

Abstract

PURPOSE:To adjust the total amount of bias current and the bias current balance by detecting an average bias voltage of a push-pull output stage, comparing it with a setting value and applying negative feedback to the input side, and detecting a difference in currents flowing to single conductive elements constituting the push-pull output stage so as to apply negative feedback to the input side. CONSTITUTION:An input signal is inputted from an input terminal 22, led to the 1st stage differential amplifier 24 comprising Tn TR1, TR2 and inputted to a push-pull output stage 32 comprising Nch MOS-FETs 28, 30 via the next stage differential amplifier 26 comprising Tr TR4, TR5. The average gate bias voltage is adjusted automatically to a setting voltage Vr by applying DC negative feedback through an operational amplifier A2 and the total bias current at the output stage 32 is made constant in response to the reference voltage Vr. Further, an output signal of an operational amplifier A1 is fed back to the base of the Tr TR2 constituting the 1st stage differential amplifier 24. Since this loop constitutes the negative feedback, it acts like zeroing the difference thereby balancing the bias currents of the MOS-FETs 28, 30.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to transistor elements consisting of a single conductive element (i.e. non-combinmental, identical η conductivity);
The present invention relates to a power amplifier circuit equipped with a push-pull output stage (such as an MO8 probe or a vacuum tube element) in which bias adjustment is automated.

[Conventional technology]

A conventional power amplifier circuit constructed with a push-pull output stage consisting of a single conductive element is shown in FIG.

This involves inputting mutually opposite phase signals to input terminals 10 and 12, and passing these signals through resistors R1 and R2 to the N09MO8-FETs 14 and 1, which constitute a push-pull stage.
I entered the gate of 6 and it was noteal. MOS-FE
T 14 and 16G; are connected to the primary winding 18a of the output transformer 18. A power supply voltage element B is applied through the center tap of this primary winding 18a. transformer 18
A speaker 20 is connected as a load to the secondary winding 18b. A voltage obtained by dividing power supply voltage element B by resistors VR, 1, and R3 is applied as a bias voltage to the MOS-FETs 14 and 16 via resistors VR2 and R4, respectively.

In this power amplifier circuit, the overall weight of the bias current is set by the volume VR1.

In other words, if the resistance field of the volume VRI is made small, M
Since the gate bias voltage of the OS-FETs 14 and 16 increases, the bias current (idling current) of the MOS-FETs 14 and 16 continues to increase.

In addition, push-pull balance (MOS-FET14.1
The balance of each bias current in step 6) can be adjusted using the volume VR.
This is done by 2. That is, the ratio of the balance current of the MOS-FET 14.16 is adjusted by the ratio of the volume VR2 and the resistor R4.

As described above, the power amplifier circuit shown in Fig. 2 has the disadvantage that two adjustments are required to set the bias: setting the overall bias current m using the volume VR1, and adjusting the push-pull balance using the volume VR2. there were.

[Problems to be solved by the invention] The present invention solves the drawbacks in the conventional techniques, and
The present invention aims to provide a power amplifier circuit that automates bias adjustment.

[Means for Solving the Problems] The present invention provides a power amplifier circuit having a push-pull output stage made of a single conductive element, which detects the average bias voltage of the push-pull output stage and compares it with a set position. A circuit that applies negative feedback to the input side of the push-pull output stage of the lever,
The device includes a circuit that detects a bias current difference flowing through two single conductive elements of the push-pull output stage and applies negative feedback to the input side of the push-pull output stage.

(Function) According to the solving means of the present invention, once the bias reference value is set, the overall bias current ω and the bias current balance are automatically adjusted.

(Example) An example of the present invention is shown in FIG. In FIG. 1, numerical examples of each element are added in parentheses for reference. In FIG. 1, an input signal is inputted manually from the input terminal 22, and from the transistor Tr1゜Tr・2 (7), the first stage differential amplifier 2a c;
4. Nc through the next stage differential amplifier 26 consisting of Tr5
It is input to a push-pull output stage 32 consisting of a MOS-FET 28°30. The first stage 24 to the output stage 32 have a direct circuit configuration. The first stage differential amplifier 24 has a common emitter current, that is, the next stage differential amplifier 12.
A transistor T r 3 is connected to the operating receiver 6 as a constant current source for setting the operating point of the push-pull output stage 32 . The push-pull output stage 32 is connected to the primary winding 34a of the output 1 lance 34. - the next winding 34a consists of two windings 34a-A which are wound oppositely to each other;
, 34a-8, with MOS-FET 28 connected to winding 34a-A and MOS-FET 30 connected to winding 34a-B. The secondary winding 34b of the output transformer 34 is connected to the output terminals 36, 38, and 40. The AC negative determines the gain of the amplifier as a whole! Ai
) M is the resistance R from the secondary side hot of the output I-lance 34
9 to the first stage inverting input (base of transistor Tr2).

MOS-FET2 that constitutes the push-pull output stage 32
The gate bias voltage of 8.30 is automatically set as follows.

MOS-FET28.30 (7) Each gate voltage C resistance R
10, R11 (R10=R11) r detection tt, operational amplifier A2 are added, converted to DC by capacitor c1, and detected as an average value. The non-inverting input of operational amplifier A2 has
A reference voltage ip, 42 whose power supply voltage Vr can be varied is connected. The output voltage of the operational amplifier A2 is input to the gate of the transistor Tr3. As a result, the operating current (operating point) of the first-stage differential amplifier 24 is controlled, and the operating current of the next-stage differential amplifier 26 is changed to i, II til, so that each gate bias voltage of the push-pull output stage 32 is adjusted. In-phase controlled. For example, if the average voltage of the gate bias voltage of the push-pull output stage 32 rises above the voltage Vr, the output voltage of the operational amplifier A2 decreases, and the constant current value of the transistor Tr3 increases. The operating current of the first-stage differential amplifier 24 increases, the dynamic f1 current of the next-stage differential (I) amplifier 26 increases, and the gate bias voltage of the push-pull output stage 32 decreases. Also,
When the average voltage of the bias voltage of the push-pull output stage 32 falls below the reference voltage vr, the operational amplifier A
The output voltage of transistor Tr2 is increased, and the constant current value flowing to transistor Tr3 is decreased. As a result, the operating current of the first-stage differential amplifier 24 decreases, the operating current of the next-stage differential amplifier 26 decreases, and the gate bias voltage of the push-pull output stage 32 increases. As described above, by applying DC negative feedback including operational amplifier A2, the average gate bias voltage is automatically adjusted to the set value Vr, so that the overall amount of bias current in the output stage 32 is kept constant according to the reference voltage Vr. be converted into

The balance of each bias current of the MOS-FETs 28 and 30 is automatically adjusted as follows.

Each bias current flowing through MOS-FET28, 30 is
Small resistance for address current detection R12゜R13 (R12=R
1, Δ bare amplifier △1, which is converted into a voltage and inputted to operational amplifier △1 in step 13), integrates these voltages with capacitors C2 and C3, and calculates the difference, that is, MOS-FET 28.
．． The unbalanced portion of the bias current of 30 is output. The output signal of the operational amplifier A1 is transferred to the base (?J-, which is the inverted input of the entire amplifier) of the transistor Tr2 constituting the first-stage differential amplifier 24. This loop [
Since negative feedback is configured, it operates so that the difference in tJ becomes O, and the bias currents of MOS-FETs 28 and 30 are balanced.

As long as you set the trapping voltage vr as described above,
The total amount of bias current is automatically fJ+adjusted J5 and the bias current balance is automatically adjusted.

[Modified example] In the above embodiment, the push-pull output stage 32 is configured with a C north follower, but the present invention can be similarly applied to a case where the push-pull output stage 32 is configured with a common source. . Further, the present invention can be similarly applied to a push-pull output stage using a bipolar transistor or a vacuum tube instead of the MO8'-FET.

In addition, in the above embodiment, the bias current detection resistor R1
2, R13 is inserted on the source side of the MOS-FETs 28 and 30, but it is also possible to insert it on the drain side.

(Effects of the Invention) As explained above, according to the present invention, the average bias voltage of the push-pull output stage is detected, compared with a set value, and negative feedback is applied to the input side of the push-pull output stage. The difference in bias current flowing through a single conductive element that makes up the output stage is detected and negative feedback is applied to the input side of the C.
By simply setting the bias reference value, the total amount of bias current and the bias/current balance can be automatically adjusted.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing one embodiment of the present invention. FIG. 2 is a circuit diagram, not shown, of a conventional power amplifier circuit with a push-pull output stage consisting of a single 59-voltage resistor. 22...Input terminal, 24...First stage differential amplifier, 26
...Next-stage differential amplifier, 32...Push-pull power single stage, R10, R11...Resistance for gate bias detection,
R12, R13...Resistance for bias current detection, 34.
・Output Lance.

Claims (1)

[Claims] In a power amplifier circuit equipped with a push-pull output stage made of a single conductive element, the average bias voltage of the push-pull output stage is detected, compared with a set value, and negative feedback is applied to the input side of the push-pull output stage. and a circuit that detects a bias current difference flowing through two single conductive elements of the push-pull output stage and applies negative feedback to the input side of the push-pull output stage. Amplification circuit.