JPS6174154U - - Google Patents

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Publication number
JPS6174154U
JPS6174154U JP15948684U JP15948684U JPS6174154U JP S6174154 U JPS6174154 U JP S6174154U JP 15948684 U JP15948684 U JP 15948684U JP 15948684 U JP15948684 U JP 15948684U JP S6174154 U JPS6174154 U JP S6174154U
Authority
JP
Japan
Prior art keywords
chip
card
microcomputer chip
microcomputer
address bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15948684U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15948684U priority Critical patent/JPS6174154U/ja
Publication of JPS6174154U publication Critical patent/JPS6174154U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本考案の一実施例を示すものであり、第
１図は本考案のＩＣカード内に組み込まれるＩＣ
モジユールにおけるマイクロコンピユーターチツ
プとメモリーチツプ間のアドレスバスの接続状態
を示すモデル図、第２図は本考案を適用した場合
のアドレスバスの配線パターンを示す説明図、第
３図は従来のアドレスバスの接続状態を示すモデ
ル図、第４図は従来のアドレスバスの配線パター
ンを示す説明図である。 １…マイクロコンピユーターチツプ、２…メモ
リーチツプ、３…アドレス線、Ｃ…ＩＣカード、
Ｍ…ＩＣモジユール。 The drawings show one embodiment of the present invention, and FIG. 1 shows an IC incorporated in the IC card of the present invention.
A model diagram showing the connection state of the address bus between the microcomputer chip and the memory chip in the module, Figure 2 is an explanatory diagram showing the wiring pattern of the address bus when the present invention is applied, and Figure 3 is the diagram of the conventional address bus. A model diagram showing the connection state, and FIG. 4 is an explanatory diagram showing the wiring pattern of a conventional address bus. 1...Microcomputer chip, 2...Memory chip, 3...Address line, C...IC card,
M...IC module.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロコンピユーターチツプと該マイクロコ
ンピユーターチツプに接続された少くとも１個の
メモリーチツプとを有するＩＣカードにおいて、
マイクロコンピユーターチツプとメモリーチツプ
間のアドレスバスの接続を正規の接続時のポート
とは異なるポート間にて施すことを特徴とするＩ
Ｃカード。 An IC card having a microcomputer chip and at least one memory chip connected to the microcomputer chip,
I characterized in that the address bus connection between the microcomputer chip and the memory chip is performed between ports different from those used for normal connection.
C card.
JP15948684U 1984-10-19 1984-10-19 Pending JPS6174154U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15948684U JPS6174154U (en) 1984-10-19 1984-10-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15948684U JPS6174154U (en) 1984-10-19 1984-10-19

Publications (1)

Publication Number Publication Date
JPS6174154U true JPS6174154U (en) 1986-05-20

Family

ID=30717442

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15948684U Pending JPS6174154U (en) 1984-10-19 1984-10-19

Country Status (1)

Country Link
JP (1) JPS6174154U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4839141A (en) * 1971-09-21 1973-06-08
JPS55151683A (en) * 1979-05-14 1980-11-26 Nippon Electric Co Integrated circuit unit controlling system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4839141A (en) * 1971-09-21 1973-06-08
JPS55151683A (en) * 1979-05-14 1980-11-26 Nippon Electric Co Integrated circuit unit controlling system

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