JPS62154571U - - Google Patents
Info
- Publication number
- JPS62154571U JPS62154571U JP4011986U JP4011986U JPS62154571U JP S62154571 U JPS62154571 U JP S62154571U JP 4011986 U JP4011986 U JP 4011986U JP 4011986 U JP4011986 U JP 4011986U JP S62154571 U JPS62154571 U JP S62154571U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- card device
- memory card
- pull
- built
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Credit Cards Or The Like (AREA)
Description
第１図はこの考案に係わるメモリーカードの一
実施例を示す回路構成図、第２図、第３図はそれ
ぞれこの考案の他の実施例を示すものであり、要
部のみを示す回路構成図、第４図、第５図はそれ
ぞれ従来のメモリーカード装置を示すものであり
、第４図は回路構成図、第５図は要部の回路構成
図である。
１１，５１…メモリーカード、１２，１３…Ｓ
ＲＡＭ、３１…接続装置。
Figure 1 is a circuit configuration diagram showing one embodiment of a memory card related to this invention, and Figures 2 and 3 are circuit diagrams showing other embodiments of this invention, respectively, and show only the main parts. , FIG. 4, and FIG. 5 respectively show conventional memory card devices. FIG. 4 is a circuit configuration diagram, and FIG. 5 is a circuit configuration diagram of main parts. 11, 51...Memory card, 12, 13...S
RAM, 31...Connection device.
Claims (1)
メモリを通常プルダウン状態とする構成としたこ
とを特徴とするメモリーカード装置。 (2) 前記メモリはハイレベルで動作され、この
メモリのチツプイネーブル端子をローレベル状態
に保持する構成としたことを特徴とする実用新案
登録請求の範囲第１項記載のメモリーカード装置
。[Scope of Claim for Utility Model Registration] (1) A memory card device characterized by having a built-in readable and writable memory and configured to normally put this memory in a pull-down state. (2) The memory card device according to claim 1, wherein the memory is operated at a high level and a chip enable terminal of the memory is maintained at a low level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4011986U JPS62154571U (en) | 1986-03-19 | 1986-03-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4011986U JPS62154571U (en) | 1986-03-19 | 1986-03-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62154571U true JPS62154571U (en) | 1987-10-01 |
Family
ID=30853917
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4011986U Pending JPS62154571U (en) | 1986-03-19 | 1986-03-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62154571U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57100520A (en) * | 1980-12-15 | 1982-06-22 | Hitachi Ltd | Memory power supply circuit |
-
1986
- 1986-03-19 JP JP4011986U patent/JPS62154571U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57100520A (en) * | 1980-12-15 | 1982-06-22 | Hitachi Ltd | Memory power supply circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS62154571U (en) | ||
| JPH01165659U (en) | ||
| JPS6425173U (en) | ||
| JPS6032735U (en) | timer | |
| JPS5928748U (en) | data card | |
| JPS62184758U (en) | ||
| JPH0328596U (en) | ||
| JPS60113953U (en) | IC package type battery | |
| JPS62175330U (en) | ||
| JPS58164159U (en) | signal switching circuit | |
| JPS621982U (en) | ||
| JPS6165756U (en) | ||
| JPH0334123U (en) | ||
| JPS6280671U (en) | ||
| JPS6365248U (en) | ||
| JPS6356669U (en) | ||
| JPS6444649U (en) | ||
| JPS62162061U (en) | ||
| JPS63105341U (en) | ||
| JPS5844826U (en) | capacitor | |
| JPS5823426U (en) | active filter circuit | |
| JPH0246671U (en) | ||
| JPS63112343U (en) | ||
| JPH0288180U (en) | ||
| JPS6325574U (en) |