JPS6173428A - Minimum value detecting circuit - Google Patents

Abstract

PURPOSE:To detect center data independently of the generating order of data to be compared with input data by a comparator by selecting a data close to the center when two data or more indicating the same difference value exist in a range to be compared with the input data. CONSTITUTION:A subtractor 11 subtracts an input data from a reference data to find out their difference value B. A comparator 12 compares the minimum data A of the precedently compared result with the difference value B. If the generation order of the reference data is the ascending order of 1-9, the refer ence data 5 can be selected even if nine reference data are completely the same by turning the center information of the reference data, i.e. the cascade input CS of the comparator 12, to the high level only when the data 2, 4, 5 are applied from the subtractor 11 as an input B. To select the center data 5 when another same data exist, the cascade input CS is turned to the high level only when the data 5 is inputted to the input B of the comparator 12 independently of the generation order of the reference data.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention compares input data or blocks with a certain range of data or a set of blocks arranged two-dimensionally, and determines which of the latter is different from the input data. It pertains to a circuit for detecting data or blocks with the minimum difference value or the sum of difference values with data in the block and its position, especially when there are 21 [1j or more data or blocks with the same difference value] The present invention relates to a minimum value detection circuit capable of selecting the data or block closest to the center of the aforementioned range.

[Conventional technology]

Figure 4 shows a motion compensation encoding method that compresses the band of an image signal and transmits it. Input block data is compared with the optimal block data in the encoding circuit 1 for each pixel, and the difference value is calculated. Generate data. A decoded signal is generated by adding this difference value data and predicted value data predicted from the corresponding pixel data of the previous frame according to a certain prediction function, and the decoded signal is stored in the frame memory 2. By accumulating one frame at a time, data for one frame before is generated. The vector detection circuit 3 compares the input block data with the previous frame data from the frame memory 2, generates optimal block data with the minimum difference value from the input block data, and Generate vector information indicating the amount and direction of movement. The encoding circuit 1 encodes the obtained difference value data and motion vector information and sends the encoded data to a transmission path.

In this case, in order to minimize the amount of information to be transmitted, in the process of detecting the optimal hector, if there are two or more pieces of data that show the same difference value within a certain range to be compared with the input data, (It is necessary to detect data that is close to the input data.

Conventionally, in the minimum value detection circuit for determining the optimal hector, when there are two or more pieces of data showing the same difference value within the range to be compared with the input data, a comparison is performed to select the data closest to the center. The order of data input to the circuit was arranged in a spiral starting from the center.

[Problem that the invention seeks to solve]

However, in order to achieve such control over the order of data input to the comparison circuit in the minimum value detection circuit, not only is a control circuit required to control data generation required, but also the order of data generation is restricted. Therefore, there was a problem in that there was no degree of freedom in the configuration of peripheral circuits.

[Means for Solving the Problems]] In the minimum value detection circuit of the present invention, input data is compared with each reference data in a certain range, and the difference value between the input data and the input data within the range is determined to be the minimum value. In addition to outputting the value data and its position information, if there are two or more data items with the minimum difference value from the input data within this range, select the data closer to the center of this range. Controls the comparison selection circuit.

[For production]

According to the minimum value detection circuit of the present invention, when there are two or more pieces of data showing the same difference value within the range to be compared with the input data, in order to select the data near the center, the comparison circuit compares the data with the input data. The central data can be detected regardless of the order in which the data to be generated are generated, and the data closest to the center can be detected with a simple data generation order.

〔Example〕

FIG. 1 shows the configuration of an embodiment of the minimum value detection circuit of the present invention when the number of data in a block is one.

In the figure, 11 is a subtraction circuit, 12 is a comparison circuit, and 13 is a subtraction circuit.
．． 14 is a selector.

Further, FIG. 2 shows the relationship between input data and reference data, where (al indicates input data IN, and (2) indicates reference data 1 to 9, respectively. In the circuit of FIG. 1, The difference between each of the reference data 1 to 9 with respect to the input data IN is determined, and the position of the reference data having the closest value to the input data 1NG is detected.

In FIG. 1, a subtraction circuit 11 subtracts input data and reference data to obtain a difference value B. Comparison circuit 12 is 11
The minimum data A and the difference value B of the 11th comparison result are compared in magnitude. At this time, when the cascade input C5, which is the central information of the reference data input to the comparison circuit 12, is at a low level, the output C of the comparison circuit 12 is the minimum data A of the previous comparison result.
is equal to or smaller than the difference value B, it becomes a low level. On the other hand, when the cascade input C3 is at a high level, the output C becomes a low level when the minimum data A of the previous comparison result is smaller than the difference value B.

The selectors 13 and 14 receive the output S of the comparator circuit 12 as a selection control signal, and select and output the inputs (1) and (2), respectively, depending on whether the output S is at a high level or a low level. In the selector 13, the minimum data of the previous comparison result is ■, and the difference value output of the subtraction circuit 11 is ■.
Also, in the selector 14, the position information of the minimum data of the previous comparison result is connected to ■, and the position information of the reference data is connected to ■, so whether the output is high level or low level. Accordingly, any of the information is output as the minimum data and the position information of the minimum data, respectively. Note that the selectors 13 and 14 are reset by a reset signal R1 every frame.

The reference data is sequentially selected and input from the vicinity of the input data, and the [1] at the center of the reference data and position information indicating the position of the reference data with respect to the input data are input.

The generation order of the reference data shown in FIG. 2 is I.

2.3.4, 5.6.7.8.9, the central information of the reference data, that is, the cascade input C3 of the comparator circuit I2, is 2.4 as the input B from the subtraction circuit 11.
．． If 5 is added, the level becomes high, then reference data 5 will be selected even if the reference data 91111 are all the same, for example. However, in this case, the amount is 5 for the data closest to the center and 2.4 for the next closest data.
, 6.8, and the farthest data are considered as 1.3 and 7.9.

Also, the generation order of reference data is 1.4, 7.2°, 5.8.
6.9, the same result can be obtained in the same way.

Note that when the same data exists elsewhere, if the central data 5 is to be selected, the order in which the reference data are generated is completely arbitrary, and only when 5 is input to the 8 inputs of the comparator circuit 12, It is sufficient to set the cascade input C3 to a high level.

FIG. 3 shows another configuration example of the present invention, and shows a configuration for detecting a block in which the sum of the difference values of data within the block is the minimum value. In the same figure, the same parts as in FIG.
7.18.19 are registers.

In the case of this embodiment, it is necessary to calculate the sum of difference values in block units. Therefore, the output of the subtraction circuit 11 is added to the output of the register 17 and the addition circuit 15, and then the output of the register 17 is added to the output of the register 17.
Enter 7. This is repeated within one block.

The output of register 17 is input to comparator circuit 12 and compared with the previous minimum value in register 18. Based on the comparison result, the selector 13 selects the input (■) or (2) and sets it in the register 18.

Further, the output of the selector 14 is sent to the register I9 by cross-linking in units of blocks. Selector 13, 1
4 is reset by the reset signal R1 when the &Ji block is input, that is, at the beginning of the frame. Further, the register 17 is also reset for each block by the reset signal R2.

[Invention glue J fruit]

As explained above, according to the optimal vector detection circuit of the present invention, input data or blocks are compared in size with each of the reference data or blocks within a certain range, and the difference value between the input data and the block within the range is calculated. In addition to outputting the data with the minimum sum of the difference values of the data in the block and the report of the position, output the data with the minimum difference value with the input data or the sum of the difference values of the data in the block within this range. When there are two or more blocks, the comparison selection circuit is controlled to select the data or block closer to the center of this range, so the same data or block with the minimum difference value is selected in the range where the data or block should be referenced. Alternatively, when there are two or more blocks, the data or block closest to the center of the range can be selected by a simple data generation order. In addition, when there is the same data or block in addition to the center data or block in the range where the data or block should be referenced, only the center data or block can be selected, regardless of the order in which the data are generated.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration of an embodiment of the minimum value detection circuit of the present invention, FIG. 2 is a diagram showing the relationship between input data and reference data, and FIG. 3 is a diagram showing the configuration of an embodiment of the minimum value detection circuit of the present invention. FIG. 4 is a diagram showing the configuration of another embodiment, and FIG. 4 is a diagram showing a motion compensation encoding method.

Claims (1)

[Claims] Compare the size of input data or an input data block that is a set of multiple input data with each reference data or reference data block in a certain range to determine the difference value between the input data and the data within the block within the range. A comparison and selection circuit that outputs data or a block with a minimum sum of difference values and information on its position, and a comparison selection circuit that outputs data or blocks with a minimum sum of difference values and information on its position, and a comparison selection circuit that outputs data or blocks with a minimum difference value with the input data or block within the range. and a circuit for generating a signal for controlling the comparison and selection circuit to select data or blocks closer to the center of the range.