JPS6169848U - - Google Patents
Info
- Publication number
- JPS6169848U JPS6169848U JP1984154198U JP15419884U JPS6169848U JP S6169848 U JPS6169848 U JP S6169848U JP 1984154198 U JP1984154198 U JP 1984154198U JP 15419884 U JP15419884 U JP 15419884U JP S6169848 U JPS6169848 U JP S6169848U
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- loss
- temperature
- pellets
- high voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000008188 pellet Substances 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 2
- 229910052710 silicon Inorganic materials 0.000 claims 2
- 239000010703 silicon Substances 0.000 claims 2
- 238000005219 brazing Methods 0.000 claims 1
- 238000010030 laminating Methods 0.000 claims 1
- 238000011084 recovery Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984154198U JPS6169848U (enrdf_load_stackoverflow) | 1984-10-15 | 1984-10-15 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984154198U JPS6169848U (enrdf_load_stackoverflow) | 1984-10-15 | 1984-10-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6169848U true JPS6169848U (enrdf_load_stackoverflow) | 1986-05-13 |
Family
ID=30712192
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984154198U Pending JPS6169848U (enrdf_load_stackoverflow) | 1984-10-15 | 1984-10-15 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6169848U (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20220053488A (ko) | 2020-10-22 | 2022-04-29 | 신에쓰 가가꾸 고교 가부시끼가이샤 | 오늄염, 화학 증폭 레지스트 조성물 및 패턴 형성 방법 |
-
1984
- 1984-10-15 JP JP1984154198U patent/JPS6169848U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20220053488A (ko) | 2020-10-22 | 2022-04-29 | 신에쓰 가가꾸 고교 가부시끼가이샤 | 오늄염, 화학 증폭 레지스트 조성물 및 패턴 형성 방법 |
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