JPS6163872U - - Google Patents
Info
- Publication number
- JPS6163872U JPS6163872U JP13159885U JP13159885U JPS6163872U JP S6163872 U JPS6163872 U JP S6163872U JP 13159885 U JP13159885 U JP 13159885U JP 13159885 U JP13159885 U JP 13159885U JP S6163872 U JPS6163872 U JP S6163872U
- Authority
- JP
- Japan
- Prior art keywords
- film
- integrated circuit
- circuit board
- lead
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000853 adhesive Substances 0.000 claims description 2
- 230000001070 adhesive effect Effects 0.000 claims description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims 1
- 229910052799 carbon Inorganic materials 0.000 claims 1
- 239000012943 hotmelt Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 description 3
- 210000002858 crystal cell Anatomy 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第１図は本考案を適用したフイルム回路基板を
備えた小型電子式計算機の一実施例を示す分解斜
視図、第２図はフイルム回路基板の開放状態を示
す平面図、第３図はフイルム回路基板における集
積回路チツプ取付状態を示す断面図、第４図はフ
イルム回路基板と液晶セルとの接続状態を示す断
面図である。
４…フイルム回路基板構造体、７…第１のフイ
ルム基体（フイルム回路基板）、８…第２のフイ
ルム基板（絶縁フイルム）、１５…端子、２３…
絶縁性接着剤、２４…集積回路チツプ、２７…端
子。
Fig. 1 is an exploded perspective view showing an embodiment of a small electronic calculator equipped with a film circuit board to which the present invention is applied, Fig. 2 is a plan view showing the film circuit board in an open state, and Fig. 3 is a film circuit. FIG. 4 is a sectional view showing the state in which the integrated circuit chip is attached to the substrate, and FIG. 4 is a sectional view showing the state in which the film circuit board and the liquid crystal cell are connected. 4... Film circuit board structure, 7... First film substrate (film circuit board), 8... Second film substrate (insulating film), 15... Terminal, 23...
Insulating adhesive, 24... integrated circuit chip, 27... terminal.
Claims (1)
板の各端子との間にカーボンペーストを介在させ
て重合配置するとともに、少なくとも、前記リー
ドに対向する面にホツトメルトタイプの絶縁性接
着剤を固着した絶縁性フイルムにより前記集積回
路チツプのリードを覆い、前記絶縁性フイルムと
前記フイルム回路基板とを加熱圧着して前記集積
回路チツプの各リードを前記フイルム回路基板の
各端子に接合してなることを特徴とする集積回路
チツプの取付構造。 A carbon paste is interposed between each lead of the integrated circuit chip and each terminal of the film circuit board, and an insulating layer is provided in which a hot-melt type insulating adhesive is adhered to at least the surface facing the leads. The lead of the integrated circuit chip is covered with a conductive film, and the insulating film and the film circuit board are bonded under heat to bond each lead of the integrated circuit chip to each terminal of the film circuit board. Mounting structure for integrated circuit chips.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13159885U JPS6163872U (en) | 1985-08-30 | 1985-08-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13159885U JPS6163872U (en) | 1985-08-30 | 1985-08-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6163872U true JPS6163872U (en) | 1986-04-30 |
Family
ID=30690177
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13159885U Pending JPS6163872U (en) | 1985-08-30 | 1985-08-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6163872U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03109373U (en) * | 1990-02-22 | 1991-11-11 |
-
1985
- 1985-08-30 JP JP13159885U patent/JPS6163872U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03109373U (en) * | 1990-02-22 | 1991-11-11 |
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