JPS6161488A - Method of forming fine pattern - Google Patents
Method of forming fine patternInfo
- Publication number
- JPS6161488A JPS6161488A JP18256684A JP18256684A JPS6161488A JP S6161488 A JPS6161488 A JP S6161488A JP 18256684 A JP18256684 A JP 18256684A JP 18256684 A JP18256684 A JP 18256684A JP S6161488 A JPS6161488 A JP S6161488A
- Authority
- JP
- Japan
- Prior art keywords
- circuit pattern
- fine
- fine pattern
- heated
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Manufacturing Of Printed Wiring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
［発明の分野１
本発明は、電子回路などに使用するプリント基板を作成
するための微細パターン形成方法に関する。この方法は
、特に、自動車、カメラ、電卓などに使用する微細回路
パターンを有するプリント基板を作成するに際し好適な
もので、フレキシブルプリント基板への応用も可能であ
る。DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention 1] The present invention relates to a method for forming fine patterns for producing printed circuit boards used for electronic circuits and the like. This method is particularly suitable for producing printed circuit boards with fine circuit patterns for use in automobiles, cameras, calculators, etc., and can also be applied to flexible printed circuit boards.
〔発明の背景］
従来のプリント基板は、不導体の基板表面に導体の金属
膜を接着し、これに感光性のレジストを塗布した後、回
路パターンを写真手法によってレジスト上に転写し、エ
ツチングによって金属回路パターンを形成するか、ある
いは、耐エツチング性のあるインクで回路パターンを印
刷し、エツチングによってパターンニングした部分以外
の金属を除去して金属回路パターンを形成する方法を取
っていた。これらの手法で゛は、０．０５ｍｍ〜０．１
ｍｍ程度の線幅の回路パターンを形成するのが実用限界
・であると言われている。[Background of the Invention] Conventional printed circuit boards are made by bonding a conductive metal film to the surface of a non-conducting substrate, coating this with a photosensitive resist, transferring a circuit pattern onto the resist using a photographic method, and then etching it. The method used was to form a metal circuit pattern, or to print the circuit pattern with etching-resistant ink, and then remove metal other than the patterned areas by etching to form a metal circuit pattern. In these methods, ゛ is 0.05 mm to 0.1
It is said that the practical limit is to form a circuit pattern with a line width of about mm.
［発明の目的］
本発明の目的は、従来手法の数分の−から士数分の−の
微細回路パターンを形成させることが可能で、か゛つ抵
抗性のあるインクでパターンニングすることによって回
路パターン上に抵抗素子をも形成さＵることが可能な微
細パターンの形成方法を提供することにある。[Object of the Invention] The object of the present invention is to be able to form a fine circuit pattern that is several times smaller than the conventional method, and to form a circuit pattern by patterning with a highly resistive ink. It is an object of the present invention to provide a method for forming a fine pattern that allows a resistive element to be formed on the pattern.
［実施例の説明］ 以下、図面を用いて本発明の詳細な説明する。[Explanation of Examples] Hereinafter, the present invention will be explained in detail using the drawings.
第１図は、本発明の一実施例で、１は加熱により収縮す
る性質（熱収縮性）を付与したＰＶＣなとの基板、２は
導電性インクあるいはり電性樹脂塗料（たとえばエポキ
シ系の樹脂材に金属微粉末を混入したもの）で印刷した
回路パターン、３は電気抵抗性を有する導電性樹脂塗料
（たとえばエポキシ系の樹脂材にカーボンの微粉末を混
入したもの）で印刷した回路の抵抗素子である。Figure 1 shows an embodiment of the present invention, in which 1 is a substrate made of PVC that has the property of shrinking when heated (heat shrinkable), 2 is a substrate made of conductive ink or electrostatic resin paint (e.g., epoxy type). 3 is a circuit pattern printed with a conductive resin paint with electrical resistance (for example, an epoxy resin mixed with fine carbon powder). It is a resistance element.
本発明によると、先ず、第１図左側に示すように、基板
１に回路パターン２および抵抗素子３を印刷（例えばシ
ルク印刷等）する。次に、これをオーブン等の加熱器内
で加熱する。これにより、基板１は、その収縮率に応じ
て収縮し、同時に基板１上の回路パターン２および抵抗
素子３も収縮して同図右側に示すような微細パターンが
形成されたプリント配線基板が得られる。According to the present invention, first, as shown on the left side of FIG. 1, a circuit pattern 2 and a resistive element 3 are printed on a substrate 1 (for example, by silk printing). Next, this is heated in a heater such as an oven. As a result, the substrate 1 contracts according to its shrinkage rate, and at the same time, the circuit pattern 2 and the resistive element 3 on the substrate 1 also contract, resulting in a printed wiring board on which a fine pattern as shown on the right side of the figure is formed. It will be done.
第２図は、プリント基板を円筒状の物体例えば絶縁物４
の側面に密着させた例を示す。このようなプリント基板
を作成するためには、第１図の基板１自体として筒状の
もの（例えば三菱化成工業株式会社製の商品名ヒシチュ
ーブ）を用い、これに回路パターン２Ｊ′３よび抵抗素
子３を印刷したもの（第２図左側）で絶縁物４の曲面を
覆った後、加熱することにより収縮させて第２図右側に
示すように密着させる。同様の手法により、球面または
より複雑な形状の面にも密着させることができる。なお
、基板１自体を回路パターン２や抵抗素子３等と物体４
との絶縁に利用し得る場合、物体４は必ずしも絶縁体で
ある必要はない。Figure 2 shows how the printed circuit board is connected to a cylindrical object such as an insulator 4.
An example is shown in which it is placed in close contact with the side of the In order to create such a printed circuit board, a cylindrical board (for example, Hishitube manufactured by Mitsubishi Chemical Industries, Ltd.) is used as the board 1 shown in FIG. 1, and a circuit pattern 2J'3 and a resistor are attached to this After covering the curved surface of the insulator 4 with a printed element 3 (left side of FIG. 2), it is heated to shrink and adhere tightly as shown on the right side of FIG. 2. A similar technique can also be used to make it adhere to a spherical surface or a surface with a more complex shape. Note that the board 1 itself is connected to the circuit pattern 2, the resistive element 3, etc., and the object 4.
The object 4 does not necessarily have to be an insulator if it can be used for insulation from the other objects.
［実施例の変形例］
なお、上述においては加熱により収縮する材料を用いて
いるが、冷却により収縮する材料を用いても本発明は実
施することができる。[Modifications of Embodiments] In the above description, a material that shrinks when heated is used, but the present invention can also be practiced using a material that shrinks when cooled.
［発明の効果〕
以上のように、本発明によれば、印刷手法により回路パ
ターンを形成させるようにしているため、平面以外のた
とえば円筒面などに微細回路パターンを形成させること
も可能である。また、加熱あるいは冷却により収縮させ
るようにしているため、その加熱あるいは冷却温度及び
時間を管理することによって任意の寸法（倍率）にまで
縮小することができる。さらに、３次元の複雑な曲面に
沿わせたプリント基板として使用することも可能である
。したがって、本発明の微細パターン形成方法は、電子
回路、素子の小形化に伴って、各分野におけるプリント
基板作成手段として有効であり、その応用弁′野は極め
て広い。[Effects of the Invention] As described above, according to the present invention, since a circuit pattern is formed by a printing method, it is also possible to form a fine circuit pattern on a surface other than a flat surface, such as a cylindrical surface. Further, since the material is contracted by heating or cooling, it can be reduced to any size (magnification) by controlling the heating or cooling temperature and time. Furthermore, it can also be used as a printed circuit board along a three-dimensional complex curved surface. Therefore, the fine pattern forming method of the present invention is effective as a means for producing printed circuit boards in various fields as electronic circuits and elements become smaller, and its application range is extremely wide.
第１図は、本発明の微細パターン形成方法を用いて平面
状プリント板を作成する様子を説明するための図、
第２図は、本発明の微細パターン形成方法を用いて円筒
状物体に密着したプリント板を作成する様子を説明する
ための図である。
１・・・熱収縮性基板、２・・・回路バクーン、３・・
・抵抗素子、４・・・絶縁物。FIG. 1 is a diagram for explaining how a planar printed board is created using the fine pattern forming method of the present invention, and FIG. FIG. 1...Heat-shrinkable board, 2...Circuit Bakun, 3...
- Resistance element, 4... Insulator.
Claims (1)
る特性および電気的に絶縁体としての性質を有する高分
子材料に、導電性のインクで回路パターンを印刷した後
、加熱あるいは冷却によって上記高分子材料を収縮させ
て上記回路パターンを縮小することにより微細回路パタ
ーンを形成することを特徴とする微細回路パターンの形
成方法。 ２、前記回路パターンが電気抵抗を有するインクで形成
された抵抗素子部分を含んでいる特許請求の範囲第１項
記載の微細回路パターンの形成方法。[Claims] 1. Printing a circuit pattern with conductive ink on a polymeric material whose surface area shrinks when heated or cooled and which has properties as an electrical insulator, and then heated or cooled. A method for forming a fine circuit pattern, characterized in that a fine circuit pattern is formed by shrinking the polymer material to reduce the size of the circuit pattern. 2. The method for forming a fine circuit pattern according to claim 1, wherein the circuit pattern includes a resistive element portion formed of ink having electrical resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18256684A JPS6161488A (en) | 1984-09-03 | 1984-09-03 | Method of forming fine pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18256684A JPS6161488A (en) | 1984-09-03 | 1984-09-03 | Method of forming fine pattern |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6161488A true JPS6161488A (en) | 1986-03-29 |
Family
ID=16120514
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18256684A Pending JPS6161488A (en) | 1984-09-03 | 1984-09-03 | Method of forming fine pattern |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6161488A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2021526316A (en) * | 2018-07-06 | 2021-09-30 | レイセオン カンパニー | Adjusted conductive interconnect structure with microstructure supported by shrinkable polymer |
-
1984
- 1984-09-03 JP JP18256684A patent/JPS6161488A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2021526316A (en) * | 2018-07-06 | 2021-09-30 | レイセオン カンパニー | Adjusted conductive interconnect structure with microstructure supported by shrinkable polymer |
| US11638348B2 (en) | 2018-07-06 | 2023-04-25 | Raytheon Company | Patterned conductive microstructures within a heat shrinkable substrate |
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