JPS6161473B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic music selection device for a tape recorder.

Recently, an automatic song selection system that automatically selects and plays a desired song by detecting the no-signal portion between the signals of music recorded on magnetic tape, that is, the song interval in fast forward or rewind mode. Devices have begun to be added to tape recorders.

Generally, this automatic music selection device uses a music selection switch that changes the desired music in sequence each time the switch is pressed. There are two methods: a SW compatible programming method in which a song is programmed by pressing a corresponding switch.

However, both types have advantages and disadvantages, and it is most desirable for an IC for automatic music selection to be compatible with both types from the standpoint of cost reduction. However, in order to achieve this, the number of elements increases, the circuit becomes complicated, and the number of terminals increases, which not only makes it impossible to achieve the desired cost reduction, but also increases IC assembly costs and decreases the IC mounting rate. It ends up being an invitation.

In view of these points, the present invention focuses on a timing generation circuit that applies a clock pulse to a shift register for music selection in response to a music selection switch, and makes the timing generation circuit common between the sequential program method and the SW compatible program method. And the circuit
The purpose is to provide a new automatic music selection device that minimizes the number of terminals when integrated into an IC.

Embodiments of the present invention will be described below with reference to the drawings.

In FIG. 1, 1 is a music selection switch for the forward program mode, 2 to 4 are SW compatible music selection switches for the program mode, 5 is an input terminal to which signals from the music selection switches 1 and 2 to 4 for both modes are applied, and 6 7 is a mode switching terminal to which a switching signal P/S for both modes is input; 7 is an inter-song detection circuit (not shown) that detects a no-signal portion, that is, an inter-song between signals such as music recorded on a magnetic tape; ) to which the inter-track detection signal K is applied; 8 indicates each terminal 5, 6,
7 is a timing generation circuit; 9 is a music selection shift register to which a clock pulse CLK2 and a shift direction switching signal R/L are inputted from the timing generation circuit 8 , and is capable of shifting in both left and right directions.

This music selection shift register 9 is composed of flip-flops 10 to 13, multiplexers 14 to 17 for controlling the shift direction, and an AND gate 18. LEDs 19, 20, and 21 are connected to the output terminals of the flip-flops 11 to 13, respectively. ,
The lighting indicates which flip-flop is set to logic "1". Further, a plunger is connected to the output end of the flip-flop 10 to cancel the fast forward or rewind state and to bring the tape recorder into the playback state.

The multiplexers 14 to 17 are composed of analog gates 22 and 23 and an inverter 24, as shown in FIG.
When L is "H", the analog gates 22 and 23 are turned on and off, respectively, thereby connecting the A terminal and the C terminal, so that the output terminal Q of the flip-flop in the previous stage is connected to the input terminal D of the flip-flop in the subsequent stage.
, the shift register 9 enters the rightward shift mode. Also, the signal R/L input to the E terminal
When is "L", the analog gates 22 and 23 are turned off and on, respectively, and the B and C terminals are connected. Therefore, the output terminal Q of the flip-flop in the subsequent stage is connected to the input terminal D of the flip-flop in the previous stage.
, the shift register 9 enters the leftward shift mode.

Further, to describe the configuration of the timing generation circuit 8 in detail, 5 is a flip-flop to which the signal S0 inputted to the input terminal ₅ is applied to the clock terminal, 26 is a flip-flop to which the inter-track detection signal K is applied to the clock terminal, 27 is an oscillation circuit including a resistor R and a capacitor C externally connected to the IC, 28 and 29 are clock pulses output from the oscillation circuit 27.
A flip-flop inputs CLK1 to the clock terminal; 30 is a NOR gate that generates an output only when the outputs Q ₅ and Q ₆ of flip-flops 28 and 29 are in a predetermined state; NOR
A NAND gate inputs the output of the gate 30 and resets the flip-flop 26 with the output, a NOR gate 33 inputs the Q outputs of the flip-flops 25 and 26 and resets the flip-flops 28 and 29 with the output, and a mode switching signal P/S. NAND gate with input signal S ₀ ,
35 is the output of NAND gate 34 and NOR gate 3
The NAND gate 36 which inputs the output of 0 is
Output of NAND gate 35 and flip-flop 26
It is a NAND gate which inputs the output of the flip-flop 25 and resets the flip-flop 25 by the output.The output _Q4 of the flip-flop 25 is used as the left/right shift direction switching signal R/L, and the output _Q6 of the flip-flop 29 is used as the clock pulse CLK2 for music selection. The signal is input to the shift register 9 .

Here, the oscillation circuit 27 starts oscillating when the "L" output of the flip-flop 25 or 26 is applied to the NAND gate 37.

By the way, in an automatic music selection device, before performing the so-called automatic music selection operation in which the song interval is detected by pressing the fast forward or rewind button and the desired song is automatically played, the automatic music selection device selects the number of songs by pressing the music selection switch. It is necessary to perform a program operation to set the song selection shift register as to whether the song will be automatically selected.
Or, by operating 2 to 4 to shift and set logic "1" to any of the flip-flops 11 to 13 corresponding to the first to third songs,
For example, if it is desired to automatically select the second song, the flip-flop 12 may be set to logic "1".

Therefore, the program operations in the progressive program mode and the corresponding program mode will be explained in more detail with reference to FIGS. 3 and 4.

First, in order to enter the sequential program mode, a mode switching signal P/S of "L" is applied to the switching terminal 6. When the music selection switch 1 for the forward program mode is pressed in this state, the input signal _S0 of "H" is applied to the clock terminal CL of the flip-flop 25, and the output _Q4 becomes "H" as shown in FIG. becomes. Therefore, the reset of the flip-flops 28 and 29 is canceled by the output of the NOR gate 33, and the left/right shift direction switching signal R/L becomes "H", and the music selection shift register 9 is set to the right shift mode. Also, the output of the flip-flop 25 becomes "L", and the NAND gate 3
P channel MOS FET39 via 7 and 38
is turned on, the potential at point P changes from "L" to "H". However, when the potential at point P becomes "H", the inputs of the NAND gate 38 both become "L" and turn off the P channel MOS FET 39, so the potential at point P is changed by resistor R and capacitor C as shown in Figure 3A. Gradually descends according to a certain number. Then, when the potential at point P becomes "L", Schmitt inverter 40 and inverter 4
An “H” signal is applied to the NAND gate 38 via 1 and 42, and the P channel MOS FET 39
Turn on. Such operations are repeated, and a clock pulse CLK1 as shown in FIG. 3C is output.

When this clock pulse CLK1 is input to the clock terminals CL of flip-flops 28 and 29, since the output of the flip-flop 29 is input to the input terminal D of the flip-flop 28, the output _Q5 is It becomes "H" as shown in Figure 3 D. Then, the next clock pulse CLK1 causes the output _Q6 to become “H”.
When the clock pulse CLK1 is further applied, the output _Q5 becomes "L" and the output _Q6 becomes "H". Then, the inputs to the NOR gate 30 both become "L", and the output _G0 becomes "H".

Here, since the mode switching signal P/S is "L", the output G ₀ of "H" is the NAND gate 35 and
Flip-flop 25 via NOR gate 36
is applied to reset the flip-flop 25.

Therefore, the output _Q4 changes to "L" and the signal R/L
becomes "L" and switches the music selection shift register 9 to leftward shift mode, and the output _Q4 becomes "L".
Flip-flop 28 via NOR gate 33
and 29, both outputs _Q5 and _Q6 become "L", and the application of the clock pulse CLK2 to the music selection shift register 9 is stopped. Furthermore, when the flip-flop 25 is reset, the output applied to the NAND gate 37 becomes "H", so that the generation of the clock pulse CLK1 is also stopped.

In this way, in the forward program mode, only one clock pulse CLK2 is applied from the timing generation circuit 8 to the music selection shift register 9 in response to the depression of the music selection switch 1. Therefore, if the first song is currently programmed, in order to change it to the third song, the song selection switch 1 only has to be pressed twice.

Incidentally, the flip-flop 26 is reset by the output of the NAND gate 31 which inputs the output of the flip-flop 25, so when the input signal from the music selection switch 1 is applied to the flip-flop 25, it is forcibly reset and cannot be reset by program operation. During the right shift operation, the inter-track detection signal K does not cause any operation.

Next, the case where the mode switching signal P/S of "H" is input to the switching terminal 6 to set the SW compatible program mode will be described with reference to FIG.

For example, suppose that the first song is programmed and you want to change it to the third song.

Since the first song is programmed, the output Q1 of flip-flop 11 is "H".
Therefore, the "L" signal is transmitted through the inverter 43.
The voltage is applied to the cathode of the LED 19, and the LED 19 is lit.

Therefore, when the music selection switch 4 is pressed, an "H" signal is applied to the clock terminal of the flip-flop 25, and as in the forward program mode, the music selection shift register 9 is placed in the rightward shift mode, and the flip-flops 28 and 29 are The state changes sequentially by the clock pulse CLK1, and the output _Q5 becomes "L" and the output _Q6 becomes "H".
Therefore, the NOR gate 30 outputs an "H" G ₀ signal. However, the mode switching signal P/S
is "H", and since the music selection switch 4 remains pressed and the input signal _S0 is "H" as shown in FIG. 4(b), the output of the NAND gate 34 is
Unlike in the sequential program mode, it becomes "L". Therefore, flip-flop 25 is not reset, and therefore flip-flops 28 and 29 are not reset either, and the output of flip-flop 25 remains in the "L" state.
The clock pulse CLK1 also occurs without stopping. That is, the states of flip-flops 28 and 29 are sequentially changed by the clock pulse CLK1 as shown in FIG. 4E and F.

Then, the logic "1" is shifted from the flip-flop 11 to the flip-flop 12 by the first clock pulse CLK2, and the LED 19 is turned off and the LED 20 is turned on. next clock pulse
CLK2 further shifts the logic "1" from flip-flop 12 to flip-flop 13, turning off LED 20 and turning on LED 21. That is, the third song is programmed.

In this way, flip-flop 13 is set to logic "1".
is shifted and its output _Q3 becomes "H",
Even though the music selection switch 4 remains pressed, the input signal S ₀ is changed to the fourth one by the inverter 44.
It changes from "H" to "L" as shown in the figure (b). Therefore, an "L" signal is applied to the NAND gate 34, and an "H" signal is applied to the NAND gate 35. That is, this state is exactly the same as the forward mode in which the "L" mode switching signal is applied to the NAND gate 34. Therefore, when the outputs Q ₅ and Q ₆ of the flip-flops 28 and 29 become "L" and "H", respectively, the outputs of the flip-flops 25, 28, 29 become "L" and "H", respectively, as in the forward mode.
are all reset, and for this reason, the music selection shift register 9 is switched to leftward shift mode, and
Clock pulse to shift register 9 for music selection
Application of CLK2 is stopped.

In this manner, in the SW compatible program mode, the clock pulse CLK2 is continuously applied from the timing generation circuit 8 to the music selection shift register 9 as shown in FIG. 4 in response to the depression of the music selection switches 2 to 4.

Next, automatic music selection operation will be explained.

Now, the third song is programmed and LED2
Assume that 1 is lit. In this state, when the fast forward or rewind button is pressed, detection between songs is started.
First, when the first song interval is detected, the song interval detection signal K is applied to the clock terminal of the flip-flop 26, so that an "L" output is applied to the NAD gate 37, and the oscillation circuit 27 generates the clock pulse CLK1. At the same time, NOR gate 33
As a result, the reset of flip-flops 28 and 29 is released, and the output states of both flip-flops 28 and 29 sequentially change. And the output
When Q ₅ and Q ₆ become "L" and "H" respectively, an output G ₀ of "H" is output from the NOR gate 30, and this G ₀
The signal resets flip-flop 26. That is, when an interval between songs is detected, one clock pulse CLK2 is output.

Here, the inter-track detection signal K is applied to the flip-flop 2.
6, the "H" output is input to the flip-flop 25 via the NAND gate 36, so the flip-flop 25 remains reset. Therefore, the _Q4 output is always "L" in the automatic music selection operation state, and the music selection shift register 9 is set to the leftward shift mode.

In other words, when the first song interval is detected, a logic "1" is shifted from flip-flop 13 to flip-flop 12.
LED21 goes out and LED20 lights up. Similarly, when the next song interval is detected, logic "1" is shifted from flip-flop 12 to flip-flop 11, LED 20 is turned off and LED 19 is turned on. Furthermore, when the next song interval is detected, the logic "1" shifts from flip-flop 11 to 10, and all LEDs 19, 20, 21
goes out, the plunger connected to the output terminal is driven by the output Q ₀ of the flip-flop 10,
The fast forward or rewind state is canceled and the tape recorder enters the playback state. In other words, the third song will be played.

As described above, a desired song is automatically selected and reproduced by the program operation and automatic song selection operation.

As mentioned above, the automatic music selection device according to the present invention uses a common timing generation circuit for the sequential program method and the SW compatible program method.
It is possible to realize a device that supports both programming methods with a simple circuit without increasing the number of elements, and since the input terminal for the music selection switch signal for both programming methods is also shared, the circuit can be easily
The number of terminals can be minimized when converting into an IC,
It is possible to suppress increases in IC assembly costs and decreases in IC mounting rate as much as possible.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the automatic music selection device according to the present invention, Fig. 2 is a specific circuit diagram of a multiplexer, Fig. 3 A to E are timing charts in the sequential program mode, and Fig. 4 A to F are timing charts in the sequential program mode. This is a timing chart in SW compatible program mode. Explanation of main figure numbers, 1... Song selection switch for sequential program mode, 2-4... Song selection switch for SW compatible program mode, 8 ... Timing generation circuit, 9 ... Shift register for song selection, 10-13
...Flip-flop, 14-17...Multiplexer, 19-20...LED, 27 ...Oscillation circuit.

Claims (1)

[Claims] 1. Detects a no-signal area between signals of music, etc. recorded on a magnetic tape in fast forward or rewind mode, and when a set number of no signal areas is detected, releases the fast forward or rewind mode and starts recording the tape. In an automatic music selection device that switches a recorder to playback mode,
A shift register in which the number of non-signal parts is set and can be shifted in both left and right directions, and a switch for a sequential program mode or a SW provided at the output end of the shift register for setting the number of non-signal parts in the shift register. It has an input terminal for inputting a signal from a switch for a corresponding program mode and a switching terminal for inputting a mode switching signal for switching between the two program modes, and the sequential program is switched in response to the signal applied to the input terminal. An automatic music selection device comprising: a timing generation circuit that applies a clock pulse to the shift register singly in the SW compatible program mode and continuously in the SW compatible program mode.