JPS6158733A - Inner layer board for multilayer substrate - Google Patents

Inner layer board for multilayer substrate

Info

Publication number
JPS6158733A
JPS6158733A JP18221684A JP18221684A JPS6158733A JP S6158733 A JPS6158733 A JP S6158733A JP 18221684 A JP18221684 A JP 18221684A JP 18221684 A JP18221684 A JP 18221684A JP S6158733 A JPS6158733 A JP S6158733A
Authority
JP
Japan
Prior art keywords
inner layer
board
copper foil
etching resist
photosensitive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18221684A
Other languages
Japanese (ja)
Inventor
堤 善朋
正光 青木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Chemical Corp
Original Assignee
Toshiba Chemical Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Chemical Corp filed Critical Toshiba Chemical Corp
Priority to JP18221684A priority Critical patent/JPS6158733A/en
Publication of JPS6158733A publication Critical patent/JPS6158733A/en
Pending legal-status Critical Current

Links

Landscapes

  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [発明の技術分野] 本発明は多層基板用内層板に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to an inner layer plate for a multilayer board.

[発明の技術的背景] 従来から、多層基板用内層板を製造するには、次のよう
な方法が行なわれている。
[Technical Background of the Invention] Conventionally, the following method has been used to manufacture an inner layer board for a multilayer board.

まず複数枚のプリプレグを積層し最外層に銅箔を配置し
て一体にプレス成形して内層基板を製造する。次いで、
この内1mM板に内層回路パターンを形成して内層回路
板を形成し、この内層回路板の所定枚数を接着層兼絶縁
層となるプリプレグを°介挿させつつ積層する。しかる
後、最外層に銅箔または銅張積層板を銅箔側を外側に向
けて重ね合せ、これらをプレス成形により一体に加熱圧
着する。
First, a plurality of sheets of prepreg are laminated, copper foil is placed on the outermost layer, and the inner layer board is manufactured by press-molding them together. Then,
An inner layer circuit pattern is formed on a 1 mm board to form an inner layer circuit board, and a predetermined number of inner layer circuit boards are laminated while interposing a prepreg serving as an adhesive layer and an insulating layer. Thereafter, copper foil or a copper-clad laminate is placed on top of the outermost layer with the copper foil side facing outward, and these are heat-pressed and bonded together by press molding.

そして上記内層回路の形成においては、銅張積層板の表
面を密着性を高めるために整面し、次いで感光性フィル
ムを貼着してエツチングレジスト層を形成した後、霧光
、現像を行なう。この後常法によりエツチングを行ない
、エツチング後にエツチングレジスト層を剥離して現れ
た回路面に酸化処理を施して、プリプレグとの密着性を
高めることが行なわれる。
In forming the inner layer circuit, the surface of the copper-clad laminate is smoothed to improve adhesion, and then a photosensitive film is attached to form an etching resist layer, followed by fogging and development. Thereafter, etching is carried out by a conventional method, and after the etching, the etching resist layer is peeled off and the exposed circuit surface is oxidized to improve its adhesion to the prepreg.

[背景技術の問題点] しかしながら、多層基板の内層回路を形成するにあたっ
ては、上述の如く多くの工程を経るため、特別な設備が
必要であり、また多層成形直前に密着性を高めるために
銅箔の酸化処理をする必要があるので、回路面の回路の
パターン密度によっては処理ムラを生ずるという難点が
ある。さらに酸化処理を小サイズのパネルリーイズで処
理するため生産性の点で難点があるうえに、回路の処理
面は多層成形するまではむき出しのため、貯蔵安定性に
制約があるという難点もあった。
[Problems with the Background Art] However, in forming the inner layer circuit of a multilayer board, special equipment is required to go through many steps as described above. Since it is necessary to oxidize the foil, there is a drawback that processing unevenness may occur depending on the pattern density of the circuit on the circuit surface. Furthermore, since the oxidation treatment is carried out on small-sized panels, there are problems in terms of productivity, and since the treated surface of the circuit is exposed until multilayer molding, there are also restrictions on storage stability. Ta.

[発明の目的] 本発明はこのような従来の欠点を解消するためになされ
たもので、銅箔面を大サイズ(例えば200 X 20
0 mm以上)の状態で黒化処理することによって生産
性を向上させることができ、ざらに銅箔面に感光性エツ
チングレジストをコーティングすることによって処理面
の保護を行なうとともに、このコーテイング材を回路形
成にも兼用できるようにした多層基板用内層板を提供す
るものである。
[Object of the Invention] The present invention was made in order to eliminate such conventional drawbacks, and it is possible to reduce the size of the copper foil surface to a large size (for example, 200 x 20
Productivity can be improved by blackening the copper foil surface (0 mm or more), and by coating the surface of the copper foil with a photosensitive etching resist, the treated surface is protected, and this coating material can be used for circuits. The present invention provides an inner layer board for a multilayer board that can also be used for forming.

[発明の概要] すなわち本発明の多層基板用内層板は、複数枚のプリプ
レグを積層し最外層に銅箔を配置して一体にプレス成形
するとともに、前記銅箔表面に感光性エツチングレジス
トをコーティングしてなることを特徴としている。
[Summary of the Invention] That is, the inner layer board for a multilayer board of the present invention is produced by laminating a plurality of sheets of prepreg, placing a copper foil on the outermost layer, press-molding them together, and coating the surface of the copper foil with a photosensitive etching resist. It is characterized by the fact that

本発明の多層基板用内層板は、ガラスクロス、ガラスペ
ーパー等の無義質基材またはポリアラミツド4J&維等
有1fill貿基材にエポキシ樹脂、ポリイミド樹脂等
の樹脂を含浸塗布乾燥させたプリプレグを所要枚数重ね
合せ、その両面または片面に銅箔を配置してステンレス
板の間に挿入し、成形プレスで加熱加圧成形して銅張g
1層板とした後、その表面に感光性エツチングレジスト
を塗布し乾燥することにより製造することができる。
The inner layer board for a multilayer board of the present invention requires a prepreg obtained by impregnating and drying a resin such as epoxy resin or polyimide resin on an undefined base material such as glass cloth or glass paper or a 1-fill base material such as polyaramid 4J & fiber. Layer up several sheets, place copper foil on both sides or one side, insert between stainless steel plates, and heat and pressurize with a molding press to form copper-plated g.
It can be manufactured by forming a one-layer plate, then applying a photosensitive etching resist to the surface and drying it.

銅張積層板の銅箔表面は、前処理として銅箔面の黒化処
理を行なう。
The copper foil surface of the copper clad laminate is subjected to blackening treatment as a pretreatment.

本発明の多層基板用内層板は、この銅箔面の黒化処理を
比較的大サイズで行ない得るので、生産性を向上させる
ことができるという利点を有する。
The inner layer board for a multilayer board according to the present invention has the advantage that the blackening treatment of the copper foil surface can be performed on a relatively large size, so that productivity can be improved.

上記処理の後、銅箔面に感光性エツチングレジストをロ
ールコータ−または浸漬法等でコーティングし、本発明
の多層基板用内層板が得られる。
After the above treatment, the copper foil surface is coated with a photosensitive etching resist using a roll coater or dipping method to obtain the inner layer plate for a multilayer board of the present invention.

上記感光性エツチングレジストとしては、エポキシ基お
よび一種または二種以上の感光性基を持つポリマーが適
している。上記の感光性基としては、例えばアクリル基
、メタクリル基のようなエチレン性2重結合を有する有
礪基があげられる。
As the photosensitive etching resist, a polymer having an epoxy group and one or more photosensitive groups is suitable. Examples of the above-mentioned photosensitive group include a group having an ethylenic double bond such as an acrylic group and a methacrylic group.

このようにして得られた多層基板用内層板は、通常光不
透過性の容器に入れて保管、運搬等が行なわれる。そし
て、必要に応じて露光、現象した後エツチングすること
により内層回路パターンを形成させ、プリプレグを介挿
させつつ所要数だけv4層させ最外層に銅箔または銅張
積層板を重ねてプレスで一体に加圧成形することによっ
て多層基板が製造される。
The inner layer plate for a multilayer substrate thus obtained is usually stored, transported, etc. in a light-opaque container. Then, if necessary, the inner layer circuit pattern is formed by exposure and etching after development, and the required number of V4 layers are formed by interposing prepreg, and the outermost layer is covered with copper foil or copper clad laminate, and then integrated by pressing. A multilayer substrate is manufactured by pressure molding.

第1図はこのようにしてM造された多層基板の構成を概
略的に示すもので、1は表面に内層回路パターン2を形
成した内層基板、3はプリプレグ、4は銅箔、5はエツ
チングレジスト層を示している。
FIG. 1 schematically shows the structure of the multilayer board manufactured in this way. 1 is an inner layer board with an inner layer circuit pattern 2 formed on its surface, 3 is a prepreg, 4 is a copper foil, and 5 is an etched board. Showing resist layer.

本発明の多層基板用内層板のエツチングレジストは、上
述の如くエポキシ基および感光性基を有するので回路パ
ターン形成が可能であり、またエポキシ基を有するので
プリプレグを配置して多層基板を成形する際には、プリ
プレグの中の硬化剤とエポキシ基とが反応して一体に硬
化する利点がある。またエツチング後剥離する必要がな
く、工程を短縮することができ、そのための特別な剥離
設備が不要となるという利点もある。またエツチングレ
ジストの膜厚を薄くできるため、ファインパターンのエ
ツチングが容易になるという利点もある。
As mentioned above, the etching resist for the inner layer board for a multilayer board of the present invention has an epoxy group and a photosensitive group, so it is possible to form a circuit pattern. has the advantage that the curing agent and epoxy group in the prepreg react and cure together. There is also the advantage that there is no need for peeling after etching, which shortens the process and eliminates the need for special peeling equipment. Furthermore, since the film thickness of the etching resist can be made thinner, there is also the advantage that etching of fine patterns becomes easier.

[発明の実施例] 次に本発明の実施例について説明する。[Embodiments of the invention] Next, examples of the present invention will be described.

実施例 第2図に示したように、510mmx5101m×0.
4mmのガラス−エポキシ樹脂両面銅張槓層板(東芝ケ
ミカル社製TLC−W−55170μFR−4グレード
)6の銅箔の表面を亜塩素酸ナトリウム45Q/12、
カセイソーダ10CJ/ぷ、リン酸ナトリウム15g/
λの組成を有する90℃の酸化処理浴中で5分間処理し
た。
Example As shown in FIG. 2, the size is 510mm x 5101m x 0.
The surface of the copper foil of 4mm glass-epoxy resin double-sided copper-clad laminate (TLC-W-55170μFR-4 grade manufactured by Toshiba Chemical Corporation) 6 was coated with sodium chlorite 45Q/12,
Caustic soda 10CJ/pu, sodium phosphate 15g/
The sample was treated for 5 minutes in a 90°C oxidation bath having a composition of λ.

次いで感光性エツチングレジストとしてPROB IM
ER48(チバガイギー社製〉溶液を用い、この溶液中
に上記の銅張積層板を浸漬し、80℃で30分間乾燥し
て約9μmの感光性エツチングレジスト層を形成させた
Then PROB IM was used as a photosensitive etching resist.
Using an ER48 (manufactured by Ciba Geigy) solution, the above-mentioned copper-clad laminate was immersed in this solution and dried at 80° C. for 30 minutes to form a photosensitive etching resist layer with a thickness of about 9 μm.

しかる後、この感光性エツチングレジスト層に内層回路
パターンを露光後、シクロヘキサンで現像し、次いでク
ロムt[Qでエツチングを行なった。
Thereafter, an inner layer circuit pattern was exposed on this photosensitive etching resist layer, developed with cyclohexane, and then etched with chromium t[Q.

図において7はこのようにして得られた内層回路パター
ン、8はエツチングレジスト層である。
In the figure, 7 is the inner layer circuit pattern obtained in this manner, and 8 is an etching resist layer.

このようにして得られた内層回路板を120℃、40分
間乾燥の後、3枚のプリプレグ(ガラスクロス、厚さ0
.18a)9を介挿させて両面に銅箔(TL−18μ福
田金属箔粉工業株式会社製)10を重ね合せ、170℃
、60分間、圧力40kg/ T11’の一定圧で成形
し、4層板を1りた。このエポキシ4層板の特性は表に
示す通りであった。
After drying the inner layer circuit board thus obtained at 120°C for 40 minutes, three sheets of prepreg (glass cloth, thickness 0
.. 18a) Layer copper foil (TL-18μ manufactured by Fukuda Metal Foil and Powder Industries Co., Ltd.) 10 on both sides with 9 interposed, and heat at 170°C.
The molding process was carried out for 60 minutes at a constant pressure of 40 kg/T11' to form a 4-layer board. The properties of this four-layer epoxy board were as shown in the table.

一般に従来の内層板を用いて製造したガラスクロス−エ
ポキシ銅張積層板は、耐熱性を持たせると接着性がやや
劣る傾向があるが、上表に示すように、本発明の内層基
板を用いて製造したエポキシ4層板にはその傾向が見ら
れず、多層基板の加工条件や使用目的に十分耐え得る品
質を有している。
In general, glass cloth-epoxy copper-clad laminates manufactured using conventional inner layer boards tend to have somewhat poor adhesion when heat resistance is added, but as shown in the table above, using the inner layer board of the present invention This tendency is not observed in the 4-layer epoxy board manufactured by the above method, and the quality is sufficient to withstand the processing conditions and purpose of use of the multilayer board.

[発明の効果] 以上説明したように本発明の多層基板用内層板は、銅箔
上に感光性エツチングレジストをコーティングしである
のでユーザ一段階における工程を短縮することができ、
予め内層銅箔に酸化処理を施し、多面取りをすることに
より著しく生産性を向上させることができ、これによっ
てコストも引き下げることができる。
[Effects of the Invention] As explained above, since the inner layer board for a multilayer board of the present invention is a copper foil coated with a photosensitive etching resist, the user can shorten the process in one step.
By oxidizing the inner layer copper foil in advance and cutting multiple layers, productivity can be significantly improved, and costs can thereby be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の多層基板用内層板の構成を概略的に示
す断面図、第2図は本発明の実施例の多層基板用内層板
の構成を説明するための図である。 1.6・・・・・・内留基板 2.7・・・・・・内層回路パターン 3.9・・・・・・プリプレグ 4.10・・・銅 箔 5.8・・・・・・エツチングレジスト層代理人弁理士
   須 山 佐 − 第1図 第2図
FIG. 1 is a sectional view schematically showing the structure of an inner layer plate for a multilayer board according to the present invention, and FIG. 2 is a diagram for explaining the structure of the inner layer plate for a multilayer board according to an embodiment of the present invention. 1.6... Internal retaining board 2.7... Inner layer circuit pattern 3.9... Prepreg 4.10... Copper foil 5.8...・Sasa Suyama, Patent Attorney for Etching Resist Layer - Figure 1 Figure 2

Claims (3)

【特許請求の範囲】[Claims] (1)複数枚のプリプレグを積層し最外層に銅箔を配置
して一体にプレス成形するとともに、前記銅箔表面に感
光性エッチングレジストをコーティングしてなることを
特徴とする多層基板用内層板。
(1) An inner layer board for a multilayer board characterized by laminating a plurality of sheets of prepreg, placing a copper foil on the outermost layer, press-molding them as one body, and coating the surface of the copper foil with a photosensitive etching resist. .
(2)感光性エッチングレジストはエポキシ基および感
光性基を持つポリマーからなることを特徴とする特許請
求の範囲第1項記載の多層基板用内層板。
(2) The inner layer plate for a multilayer substrate according to claim 1, wherein the photosensitive etching resist is made of a polymer having an epoxy group and a photosensitive group.
(3)銅箔は予め表面処理が施されていることを特徴と
する特許請求の範囲第1項または第2項記載の多層基板
用内層板。
(3) The inner layer board for a multilayer board according to claim 1 or 2, wherein the copper foil is surface-treated in advance.
JP18221684A 1984-08-31 1984-08-31 Inner layer board for multilayer substrate Pending JPS6158733A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18221684A JPS6158733A (en) 1984-08-31 1984-08-31 Inner layer board for multilayer substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18221684A JPS6158733A (en) 1984-08-31 1984-08-31 Inner layer board for multilayer substrate

Publications (1)

Publication Number Publication Date
JPS6158733A true JPS6158733A (en) 1986-03-26

Family

ID=16114376

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18221684A Pending JPS6158733A (en) 1984-08-31 1984-08-31 Inner layer board for multilayer substrate

Country Status (1)

Country Link
JP (1) JPS6158733A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61117883A (en) * 1984-11-14 1986-06-05 松下電工株式会社 Multilayer printed wiring board
JPH02266594A (en) * 1989-04-06 1990-10-31 Toshiba Chem Corp Manufacture of multilayer printed wiring board

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58197898A (en) * 1982-05-14 1983-11-17 東芝ケミカル株式会社 Method of producing multilayer printed circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58197898A (en) * 1982-05-14 1983-11-17 東芝ケミカル株式会社 Method of producing multilayer printed circuit board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61117883A (en) * 1984-11-14 1986-06-05 松下電工株式会社 Multilayer printed wiring board
JPH0570953B2 (en) * 1984-11-14 1993-10-06 Matsushita Electric Works Ltd
JPH02266594A (en) * 1989-04-06 1990-10-31 Toshiba Chem Corp Manufacture of multilayer printed wiring board

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